Scalar math stencils#
tanh_float#
STENCIL void tanh_float(float arg1) {
result_float(aux_tanh((float)arg1));
}
arm64#
0000000000000000 <tanh_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <tanh_float>
8: R_AARCH64_CALL26 aux_tanh
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <tanh_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <tanh_float>
4: R_ARM_CALL aux_tanh
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <tanh_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <tanh_float>
4: R_ARM_CALL aux_tanh
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <tanh_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tanh_float>
2: R_ARM_THM_CALL aux_tanh
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <tanh_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tanh_float>
2: R_ARM_THM_CALL aux_tanh
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <tanh_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tanh_float>
2: R_ARM_THM_CALL aux_tanh
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <tanh_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tanh_float>
2: R_ARM_THM_CALL aux_tanh
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <tanh_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT aux_tanh
8: 000080e7 jalr ra # 4 <tanh_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <tanh_float+0x10>
riscv64#
0000000000000000 <tanh_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT aux_tanh
8: 000080e7 jalr ra # 4 <tanh_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <tanh_float+0x10>
tricore#
00000000 <tanh_float>:
0: 6d 00 00 00 call 0 <tanh_float>
0: R_TRICORE_24REL aux_tanh
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <tanh_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <tanh_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <tanh_float+0x8>
8: R_386_PC32 aux_tanh
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <tanh_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <tanh_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <tanh_float+0x9>
5: R_X86_64_PLT32 aux_tanh-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
sqrt_float#
STENCIL void sqrt_float(float arg1) {
result_float(sqrtf((float)arg1));
}
arm64#
0000000000000000 <sqrt_float>:
0: 1e202008 fcmp s0, #0.0
4: 540000c5 b.pl 1c <sqrt_float+0x1c> // b.nfrst
8: a9bf7bfd stp x29, x30, [sp, #-16]!
c: 910003fd mov x29, sp
10: 94000000 bl 0 <sqrt_float>
10: R_AARCH64_CALL26 sqrtf
14: a8c17bfd ldp x29, x30, [sp], #16
18: 14000000 b 0 <result_float>
18: R_AARCH64_JUMP26 result_float
1c: 1e21c000 fsqrt s0, s0
20: 14000000 b 0 <result_float>
20: R_AARCH64_JUMP26 result_float
armv6#
00000000 <sqrt_float>:
0: eeb50a40 vcmp.f32 s0, #0.0
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: 4a000002 bmi 18 <sqrt_float+0x18>
c: eef07a40 vmov.f32 s15, s0
10: eeb10ae7 vsqrt.f32 s0, s15
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
18: e92d4010 push {r4, lr}
1c: ebfffffe bl 0 <sqrt_float>
1c: R_ARM_CALL sqrtf
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float>
24: R_ARM_JUMP24 result_float
armv7#
00000000 <sqrt_float>:
0: eeb50a40 vcmp.f32 s0, #0.0
4: eef1fa10 vmrs APSR_nzcv, fpscr
8: 4a000002 bmi 18 <sqrt_float+0x18>
c: eef07a40 vmov.f32 s15, s0
10: eeb10ae7 vsqrt.f32 s0, s15
14: eafffffe b 0 <result_float>
14: R_ARM_JUMP24 result_float
18: e92d4010 push {r4, lr}
1c: ebfffffe bl 0 <sqrt_float>
1c: R_ARM_CALL sqrtf
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float>
24: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <sqrt_float>:
0: eeb5 0a40 vcmp.f32 s0, #0.0
4: eef1 fa10 vmrs APSR_nzcv, fpscr
8: d405 bmi.n 16 <sqrt_float+0x16>
a: eef0 7a40 vmov.f32 s15, s0
e: eeb1 0ae7 vsqrt.f32 s0, s15
12: f7ff bffe b.w 0 <result_float>
12: R_ARM_THM_JUMP24 result_float
16: b508 push {r3, lr}
18: f7ff fffe bl 0 <sqrt_float>
18: R_ARM_THM_CALL sqrtf
1c: e8bd 4008 ldmia.w sp!, {r3, lr}
20: f7ff bffe b.w 0 <result_float>
20: R_ARM_THM_JUMP24 result_float
armv7mthumb_fpv5#
00000000 <sqrt_float>:
0: eeb5 0a40 vcmp.f32 s0, #0.0
4: eef1 fa10 vmrs APSR_nzcv, fpscr
8: d405 bmi.n 16 <sqrt_float+0x16>
a: eef0 7a40 vmov.f32 s15, s0
e: eeb1 0ae7 vsqrt.f32 s0, s15
12: f7ff bffe b.w 0 <result_float>
12: R_ARM_THM_JUMP24 result_float
16: b508 push {r3, lr}
18: f7ff fffe bl 0 <sqrt_float>
18: R_ARM_THM_CALL sqrtf
1c: e8bd 4008 ldmia.w sp!, {r3, lr}
20: f7ff bffe b.w 0 <result_float>
20: R_ARM_THM_JUMP24 result_float
armv7thumb#
00000000 <sqrt_float>:
0: eeb5 0a40 vcmp.f32 s0, #0.0
4: eef1 fa10 vmrs APSR_nzcv, fpscr
8: d405 bmi.n 16 <sqrt_float+0x16>
a: eef0 7a40 vmov.f32 s15, s0
e: eeb1 0ae7 vsqrt.f32 s0, s15
12: f7ff bffe b.w 0 <result_float>
12: R_ARM_THM_JUMP24 result_float
16: b508 push {r3, lr}
18: f7ff fffe bl 0 <sqrt_float>
18: R_ARM_THM_CALL sqrtf
1c: e8bd 4008 ldmia.w sp!, {r3, lr}
20: f7ff bffe b.w 0 <result_float>
20: R_ARM_THM_JUMP24 result_float
armv81mthumb#
00000000 <sqrt_float>:
0: eeb5 0a40 vcmp.f32 s0, #0.0
4: eef1 fa10 vmrs APSR_nzcv, fpscr
8: d405 bmi.n 16 <sqrt_float+0x16>
a: eef0 7a40 vmov.f32 s15, s0
e: eeb1 0ae7 vsqrt.f32 s0, s15
12: f7ff bffe b.w 0 <result_float>
12: R_ARM_THM_JUMP24 result_float
16: b508 push {r3, lr}
18: f7ff fffe bl 0 <sqrt_float>
18: R_ARM_THM_CALL sqrtf
1c: e8bd 4008 ldmia.w sp!, {r3, lr}
20: f7ff bffe b.w 0 <result_float>
20: R_ARM_THM_JUMP24 result_float
riscv32#
00000000 <sqrt_float>:
0: f00007d3 fmv.w.x fa5,zero
4: 00102773 frflags a4
8: a0f517d3 flt.s a5,fa0,fa5
c: 00171073 fsflags a4
10: e799 bnez a5,1e <sqrt_float+0x1e>
12: 58057553 fsqrt.s fa0,fa0
16: 00000317 auipc t1,0x0
16: R_RISCV_CALL_PLT result_float
1a: 00030067 jr t1 # 16 <sqrt_float+0x16>
1e: 1141 addi sp,sp,-16
20: c606 sw ra,12(sp)
22: 00000097 auipc ra,0x0
22: R_RISCV_CALL_PLT sqrtf
26: 000080e7 jalr ra # 22 <sqrt_float+0x22>
2a: 40b2 lw ra,12(sp)
2c: 0141 addi sp,sp,16
2e: 00000317 auipc t1,0x0
2e: R_RISCV_CALL_PLT result_float
32: 00030067 jr t1 # 2e <sqrt_float+0x2e>
riscv64#
0000000000000000 <sqrt_float>:
0: 00102773 frflags a4
4: f0000753 fmv.w.x fa4,zero
8: a0e517d3 flt.s a5,fa0,fa4
c: 00171073 fsflags a4
10: e799 bnez a5,1e <sqrt_float+0x1e>
12: 58057553 fsqrt.s fa0,fa0
16: 00000317 auipc t1,0x0
16: R_RISCV_CALL_PLT result_float
1a: 00030067 jr t1 # 16 <sqrt_float+0x16>
1e: 1141 addi sp,sp,-16
20: e406 sd ra,8(sp)
22: 00000097 auipc ra,0x0
22: R_RISCV_CALL_PLT sqrtf
26: 000080e7 jalr ra # 22 <sqrt_float+0x22>
2a: 60a2 ld ra,8(sp)
2c: 0141 addi sp,sp,16
2e: 00000317 auipc t1,0x0
2e: R_RISCV_CALL_PLT result_float
32: 00030067 jr t1 # 2e <sqrt_float+0x2e>
tricore#
00000000 <sqrt_float>:
0: 6d 00 00 00 call 0 <sqrt_float>
0: R_TRICORE_24REL sqrtf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <sqrt_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <sqrt_float>:
0: 83 ec 0c sub $0xc,%esp
3: d9 44 24 10 flds 0x10(%esp)
7: d9 ee fldz
9: df e9 fucomip %st(1),%st
b: 77 0e ja 1b <sqrt_float+0x1b>
d: d9 fa fsqrt
f: d9 5c 24 10 fstps 0x10(%esp)
13: 83 c4 0c add $0xc,%esp
16: e9 fc ff ff ff jmp 17 <sqrt_float+0x17>
17: R_386_PC32 result_float
1b: 83 ec 10 sub $0x10,%esp
1e: d9 1c 24 fstps (%esp)
21: e8 fc ff ff ff call 22 <sqrt_float+0x22>
22: R_386_PC32 sqrtf
26: 83 c4 10 add $0x10,%esp
29: eb e4 jmp f <sqrt_float+0xf>
x86_64#
0000000000000000 <sqrt_float>:
0: 66 0f ef c9 pxor %xmm1,%xmm1
4: 0f 2e c8 ucomiss %xmm0,%xmm1
7: 77 09 ja 12 <sqrt_float+0x12>
9: f3 0f 51 c0 sqrtss %xmm0,%xmm0
d: e9 00 00 00 00 jmp 12 <sqrt_float+0x12>
e: R_X86_64_PLT32 result_float-0x4
12: 50 push %rax
13: e8 00 00 00 00 call 18 <sqrt_float+0x18>
14: R_X86_64_PLT32 sqrtf-0x4
18: 5a pop %rdx
19: e9 00 00 00 00 jmp 1e <.LC8+0x2>
1a: R_X86_64_PLT32 result_float-0x4
exp_float#
STENCIL void exp_float(float arg1) {
result_float(expf((float)arg1));
}
arm64#
0000000000000000 <exp_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <exp_float>
8: R_AARCH64_CALL26 expf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <exp_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <exp_float>
4: R_ARM_CALL expf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <exp_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <exp_float>
4: R_ARM_CALL expf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <exp_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <exp_float>
2: R_ARM_THM_CALL expf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <exp_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <exp_float>
2: R_ARM_THM_CALL expf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <exp_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <exp_float>
2: R_ARM_THM_CALL expf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <exp_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <exp_float>
2: R_ARM_THM_CALL expf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <exp_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT expf
8: 000080e7 jalr ra # 4 <exp_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <exp_float+0x10>
riscv64#
0000000000000000 <exp_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT expf
8: 000080e7 jalr ra # 4 <exp_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <exp_float+0x10>
tricore#
00000000 <exp_float>:
0: 6d 00 00 00 call 0 <exp_float>
0: R_TRICORE_24REL expf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <exp_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <exp_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <exp_float+0x8>
8: R_386_PC32 expf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <exp_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <exp_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <exp_float+0x9>
5: R_X86_64_PLT32 expf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
log_float#
STENCIL void log_float(float arg1) {
result_float(logf((float)arg1));
}
arm64#
0000000000000000 <log_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <log_float>
8: R_AARCH64_CALL26 logf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <log_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <log_float>
4: R_ARM_CALL logf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <log_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <log_float>
4: R_ARM_CALL logf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <log_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <log_float>
2: R_ARM_THM_CALL logf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <log_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <log_float>
2: R_ARM_THM_CALL logf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <log_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <log_float>
2: R_ARM_THM_CALL logf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <log_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <log_float>
2: R_ARM_THM_CALL logf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <log_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT logf
8: 000080e7 jalr ra # 4 <log_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <log_float+0x10>
riscv64#
0000000000000000 <log_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT logf
8: 000080e7 jalr ra # 4 <log_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <log_float+0x10>
tricore#
00000000 <log_float>:
0: 6d 00 00 00 call 0 <log_float>
0: R_TRICORE_24REL logf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <log_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <log_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <log_float+0x8>
8: R_386_PC32 logf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <log_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <log_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <log_float+0x9>
5: R_X86_64_PLT32 logf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
sin_float#
STENCIL void sin_float(float arg1) {
result_float(sinf((float)arg1));
}
arm64#
0000000000000000 <sin_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <sin_float>
8: R_AARCH64_CALL26 sinf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <sin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <sin_float>
4: R_ARM_CALL sinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <sin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <sin_float>
4: R_ARM_CALL sinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <sin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <sin_float>
2: R_ARM_THM_CALL sinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <sin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <sin_float>
2: R_ARM_THM_CALL sinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <sin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <sin_float>
2: R_ARM_THM_CALL sinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <sin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <sin_float>
2: R_ARM_THM_CALL sinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <sin_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT sinf
8: 000080e7 jalr ra # 4 <sin_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <sin_float+0x10>
riscv64#
0000000000000000 <sin_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT sinf
8: 000080e7 jalr ra # 4 <sin_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <sin_float+0x10>
tricore#
00000000 <sin_float>:
0: 6d 00 00 00 call 0 <sin_float>
0: R_TRICORE_24REL sinf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <sin_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <sin_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <sin_float+0x8>
8: R_386_PC32 sinf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <sin_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <sin_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <sin_float+0x9>
5: R_X86_64_PLT32 sinf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
cos_float#
STENCIL void cos_float(float arg1) {
result_float(cosf((float)arg1));
}
arm64#
0000000000000000 <cos_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <cos_float>
8: R_AARCH64_CALL26 cosf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <cos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <cos_float>
4: R_ARM_CALL cosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <cos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <cos_float>
4: R_ARM_CALL cosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <cos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <cos_float>
2: R_ARM_THM_CALL cosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <cos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <cos_float>
2: R_ARM_THM_CALL cosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <cos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <cos_float>
2: R_ARM_THM_CALL cosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <cos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <cos_float>
2: R_ARM_THM_CALL cosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <cos_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT cosf
8: 000080e7 jalr ra # 4 <cos_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <cos_float+0x10>
riscv64#
0000000000000000 <cos_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT cosf
8: 000080e7 jalr ra # 4 <cos_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <cos_float+0x10>
tricore#
00000000 <cos_float>:
0: 6d 00 00 00 call 0 <cos_float>
0: R_TRICORE_24REL cosf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <cos_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <cos_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <cos_float+0x8>
8: R_386_PC32 cosf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <cos_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <cos_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <cos_float+0x9>
5: R_X86_64_PLT32 cosf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
tan_float#
STENCIL void tan_float(float arg1) {
result_float(tanf((float)arg1));
}
arm64#
0000000000000000 <tan_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <tan_float>
8: R_AARCH64_CALL26 tanf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <tan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <tan_float>
4: R_ARM_CALL tanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <tan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <tan_float>
4: R_ARM_CALL tanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <tan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tan_float>
2: R_ARM_THM_CALL tanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <tan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tan_float>
2: R_ARM_THM_CALL tanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <tan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tan_float>
2: R_ARM_THM_CALL tanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <tan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <tan_float>
2: R_ARM_THM_CALL tanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <tan_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT tanf
8: 000080e7 jalr ra # 4 <tan_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <tan_float+0x10>
riscv64#
0000000000000000 <tan_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT tanf
8: 000080e7 jalr ra # 4 <tan_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <tan_float+0x10>
tricore#
00000000 <tan_float>:
0: 6d 00 00 00 call 0 <tan_float>
0: R_TRICORE_24REL tanf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <tan_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <tan_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <tan_float+0x8>
8: R_386_PC32 tanf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <tan_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <tan_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <tan_float+0x9>
5: R_X86_64_PLT32 tanf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
asin_float#
STENCIL void asin_float(float arg1) {
result_float(asinf((float)arg1));
}
arm64#
0000000000000000 <asin_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <asin_float>
8: R_AARCH64_CALL26 asinf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <asin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <asin_float>
4: R_ARM_CALL asinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <asin_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <asin_float>
4: R_ARM_CALL asinf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <asin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <asin_float>
2: R_ARM_THM_CALL asinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <asin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <asin_float>
2: R_ARM_THM_CALL asinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <asin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <asin_float>
2: R_ARM_THM_CALL asinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <asin_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <asin_float>
2: R_ARM_THM_CALL asinf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <asin_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT asinf
8: 000080e7 jalr ra # 4 <asin_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <asin_float+0x10>
riscv64#
0000000000000000 <asin_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT asinf
8: 000080e7 jalr ra # 4 <asin_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <asin_float+0x10>
tricore#
00000000 <asin_float>:
0: 6d 00 00 00 call 0 <asin_float>
0: R_TRICORE_24REL asinf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <asin_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <asin_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <asin_float+0x8>
8: R_386_PC32 asinf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <asin_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <asin_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <asin_float+0x9>
5: R_X86_64_PLT32 asinf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
acos_float#
STENCIL void acos_float(float arg1) {
result_float(acosf((float)arg1));
}
arm64#
0000000000000000 <acos_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <acos_float>
8: R_AARCH64_CALL26 acosf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <acos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <acos_float>
4: R_ARM_CALL acosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <acos_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <acos_float>
4: R_ARM_CALL acosf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <acos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <acos_float>
2: R_ARM_THM_CALL acosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <acos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <acos_float>
2: R_ARM_THM_CALL acosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <acos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <acos_float>
2: R_ARM_THM_CALL acosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <acos_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <acos_float>
2: R_ARM_THM_CALL acosf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <acos_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT acosf
8: 000080e7 jalr ra # 4 <acos_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <acos_float+0x10>
riscv64#
0000000000000000 <acos_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT acosf
8: 000080e7 jalr ra # 4 <acos_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <acos_float+0x10>
tricore#
00000000 <acos_float>:
0: 6d 00 00 00 call 0 <acos_float>
0: R_TRICORE_24REL acosf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <acos_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <acos_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <acos_float+0x8>
8: R_386_PC32 acosf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <acos_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <acos_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <acos_float+0x9>
5: R_X86_64_PLT32 acosf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
atan_float#
STENCIL void atan_float(float arg1) {
result_float(atanf((float)arg1));
}
arm64#
0000000000000000 <atan_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 910003fd mov x29, sp
8: 94000000 bl 0 <atan_float>
8: R_AARCH64_CALL26 atanf
c: a8c17bfd ldp x29, x30, [sp], #16
10: 14000000 b 0 <result_float>
10: R_AARCH64_JUMP26 result_float
armv6#
00000000 <atan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <atan_float>
4: R_ARM_CALL atanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7#
00000000 <atan_float>:
0: e92d4010 push {r4, lr}
4: ebfffffe bl 0 <atan_float>
4: R_ARM_CALL atanf
8: e8bd4010 pop {r4, lr}
c: eafffffe b 0 <result_float>
c: R_ARM_JUMP24 result_float
armv7mthumb#
00000000 <atan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <atan_float>
2: R_ARM_THM_CALL atanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7mthumb_fpv5#
00000000 <atan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <atan_float>
2: R_ARM_THM_CALL atanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv7thumb#
00000000 <atan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <atan_float>
2: R_ARM_THM_CALL atanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
armv81mthumb#
00000000 <atan_float>:
0: b508 push {r3, lr}
2: f7ff fffe bl 0 <atan_float>
2: R_ARM_THM_CALL atanf
6: e8bd 4008 ldmia.w sp!, {r3, lr}
a: f7ff bffe b.w 0 <result_float>
a: R_ARM_THM_JUMP24 result_float
e: bf00 nop
riscv32#
00000000 <atan_float>:
0: 1141 addi sp,sp,-16
2: c606 sw ra,12(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT atanf
8: 000080e7 jalr ra # 4 <atan_float+0x4>
c: 40b2 lw ra,12(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <atan_float+0x10>
riscv64#
0000000000000000 <atan_float>:
0: 1141 addi sp,sp,-16
2: e406 sd ra,8(sp)
4: 00000097 auipc ra,0x0
4: R_RISCV_CALL_PLT atanf
8: 000080e7 jalr ra # 4 <atan_float+0x4>
c: 60a2 ld ra,8(sp)
e: 0141 addi sp,sp,16
10: 00000317 auipc t1,0x0
10: R_RISCV_CALL_PLT result_float
14: 00030067 jr t1 # 10 <atan_float+0x10>
tricore#
00000000 <atan_float>:
0: 6d 00 00 00 call 0 <atan_float>
0: R_TRICORE_24REL atanf
4: 02 24 mov %d4,%d2
6: 1d 00 00 00 j 6 <atan_float+0x6>
6: R_TRICORE_24REL result_float
x86#
00000000 <atan_float>:
0: 83 ec 18 sub $0x18,%esp
3: ff 74 24 1c push 0x1c(%esp)
7: e8 fc ff ff ff call 8 <atan_float+0x8>
8: R_386_PC32 atanf
c: d9 5c 24 20 fstps 0x20(%esp)
10: 83 c4 1c add $0x1c,%esp
13: e9 fc ff ff ff jmp 14 <atan_float+0x14>
14: R_386_PC32 result_float
x86_64#
0000000000000000 <atan_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: e8 00 00 00 00 call 9 <atan_float+0x9>
5: R_X86_64_PLT32 atanf-0x4
9: 48 83 c4 08 add $0x8,%rsp
d: e9 00 00 00 00 jmp 12 <.LC13+0x2>
e: R_X86_64_PLT32 result_float-0x4
atan2_float_float#
STENCIL void atan2_float_float(float arg1, float arg2) {
result_float_float(atan2f((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <atan2_float_float>:
0: a9be7bfd stp x29, x30, [sp, #-32]!
4: 910003fd mov x29, sp
8: fd000be8 str d8, [sp, #16]
c: 1e204028 fmov s8, s1
10: 94000000 bl 0 <atan2_float_float>
10: R_AARCH64_CALL26 atan2f
14: 1e204101 fmov s1, s8
18: fd400be8 ldr d8, [sp, #16]
1c: a8c27bfd ldp x29, x30, [sp], #32
20: 14000000 b 0 <result_float_float>
20: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <atan2_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <atan2_float_float>
c: R_ARM_CALL atan2f
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <atan2_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <atan2_float_float>
c: R_ARM_CALL atan2f
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
armv7mthumb#
00000000 <atan2_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <atan2_float_float>
a: R_ARM_THM_CALL atan2f
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
armv7mthumb_fpv5#
00000000 <atan2_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <atan2_float_float>
a: R_ARM_THM_CALL atan2f
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
armv7thumb#
00000000 <atan2_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <atan2_float_float>
a: R_ARM_THM_CALL atan2f
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
armv81mthumb#
00000000 <atan2_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <atan2_float_float>
a: R_ARM_THM_CALL atan2f
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
riscv32#
00000000 <atan2_float_float>:
0: 1101 addi sp,sp,-32
2: ce06 sw ra,28(sp)
4: e62e fsw fa1,12(sp)
6: 00000097 auipc ra,0x0
6: R_RISCV_CALL_PLT atan2f
a: 000080e7 jalr ra # 6 <atan2_float_float+0x6>
e: 65b2 flw fa1,12(sp)
10: 40f2 lw ra,28(sp)
12: 6105 addi sp,sp,32
14: 00000317 auipc t1,0x0
14: R_RISCV_CALL_PLT result_float_float
18: 00030067 jr t1 # 14 <atan2_float_float+0x14>
riscv64#
0000000000000000 <atan2_float_float>:
0: 1101 addi sp,sp,-32
2: a422 fsd fs0,8(sp)
4: 20b58453 fmv.s fs0,fa1
8: ec06 sd ra,24(sp)
a: 00000097 auipc ra,0x0
a: R_RISCV_CALL_PLT atan2f
e: 000080e7 jalr ra # a <atan2_float_float+0xa>
12: 60e2 ld ra,24(sp)
14: 208405d3 fmv.s fa1,fs0
18: 2422 fld fs0,8(sp)
1a: 6105 addi sp,sp,32
1c: 00000317 auipc t1,0x0
1c: R_RISCV_CALL_PLT result_float_float
20: 00030067 jr t1 # 1c <atan2_float_float+0x1c>
tricore#
00000000 <atan2_float_float>:
0: 02 58 mov %d8,%d5
2: 6d 00 00 00 call 2 <atan2_float_float+0x2>
2: R_TRICORE_24REL atan2f
6: 0b 28 10 48 mov %e4,%d8,%d2
a: 1d 00 00 00 j a <atan2_float_float+0xa>
a: R_TRICORE_24REL result_float_float
x86#
00000000 <atan2_float_float>:
0: 83 ec 28 sub $0x28,%esp
3: d9 44 24 30 flds 0x30(%esp)
7: d9 14 24 fsts (%esp)
a: d9 5c 24 18 fstps 0x18(%esp)
e: ff 74 24 2c push 0x2c(%esp)
12: e8 fc ff ff ff call 13 <atan2_float_float+0x13>
13: R_386_PC32 atan2f
17: d9 44 24 1c flds 0x1c(%esp)
1b: d9 5c 24 34 fstps 0x34(%esp)
1f: d9 5c 24 30 fstps 0x30(%esp)
23: 83 c4 2c add $0x2c,%esp
26: e9 fc ff ff ff jmp 27 <atan2_float_float+0x27>
27: R_386_PC32 result_float_float
x86_64#
0000000000000000 <atan2_float_float>:
0: 48 83 ec 18 sub $0x18,%rsp
4: f3 0f 11 4c 24 0c movss %xmm1,0xc(%rsp)
a: e8 00 00 00 00 call f <atan2_float_float+0xf>
b: R_X86_64_PLT32 atan2f-0x4
f: f3 0f 10 4c 24 0c movss 0xc(%rsp),%xmm1
15: 48 83 c4 18 add $0x18,%rsp
19: e9 00 00 00 00 jmp 1e <.LC8+0x2>
1a: R_X86_64_PLT32 result_float_float-0x4
pow_float_float#
STENCIL void pow_float_float(float arg1, float arg2) {
result_float_float(powf((float)arg1, (float)arg2), arg2);
}
arm64#
0000000000000000 <pow_float_float>:
0: a9be7bfd stp x29, x30, [sp, #-32]!
4: 910003fd mov x29, sp
8: fd000be8 str d8, [sp, #16]
c: 1e204028 fmov s8, s1
10: 94000000 bl 0 <pow_float_float>
10: R_AARCH64_CALL26 powf
14: 1e204101 fmov s1, s8
18: fd400be8 ldr d8, [sp, #16]
1c: a8c27bfd ldp x29, x30, [sp], #32
20: 14000000 b 0 <result_float_float>
20: R_AARCH64_JUMP26 result_float_float
armv6#
00000000 <pow_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <pow_float_float>
c: R_ARM_CALL powf
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
armv7#
00000000 <pow_float_float>:
0: e92d4010 push {r4, lr}
4: ed2d8b02 vpush {d8}
8: eeb08a60 vmov.f32 s16, s1
c: ebfffffe bl 0 <pow_float_float>
c: R_ARM_CALL powf
10: eef00a48 vmov.f32 s1, s16
14: ecbd8b02 vpop {d8}
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_float>
1c: R_ARM_JUMP24 result_float_float
armv7mthumb#
00000000 <pow_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <pow_float_float>
a: R_ARM_THM_CALL powf
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
armv7mthumb_fpv5#
00000000 <pow_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <pow_float_float>
a: R_ARM_THM_CALL powf
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
armv7thumb#
00000000 <pow_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <pow_float_float>
a: R_ARM_THM_CALL powf
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
armv81mthumb#
00000000 <pow_float_float>:
0: b508 push {r3, lr}
2: ed2d 8b02 vpush {d8}
6: eeb0 8a60 vmov.f32 s16, s1
a: f7ff fffe bl 0 <pow_float_float>
a: R_ARM_THM_CALL powf
e: eef0 0a48 vmov.f32 s1, s16
12: ecbd 8b02 vpop {d8}
16: e8bd 4008 ldmia.w sp!, {r3, lr}
1a: f7ff bffe b.w 0 <result_float_float>
1a: R_ARM_THM_JUMP24 result_float_float
1e: bf00 nop
riscv32#
00000000 <pow_float_float>:
0: 1101 addi sp,sp,-32
2: ce06 sw ra,28(sp)
4: e62e fsw fa1,12(sp)
6: 00000097 auipc ra,0x0
6: R_RISCV_CALL_PLT powf
a: 000080e7 jalr ra # 6 <pow_float_float+0x6>
e: 65b2 flw fa1,12(sp)
10: 40f2 lw ra,28(sp)
12: 6105 addi sp,sp,32
14: 00000317 auipc t1,0x0
14: R_RISCV_CALL_PLT result_float_float
18: 00030067 jr t1 # 14 <pow_float_float+0x14>
riscv64#
0000000000000000 <pow_float_float>:
0: 1101 addi sp,sp,-32
2: a422 fsd fs0,8(sp)
4: 20b58453 fmv.s fs0,fa1
8: ec06 sd ra,24(sp)
a: 00000097 auipc ra,0x0
a: R_RISCV_CALL_PLT powf
e: 000080e7 jalr ra # a <pow_float_float+0xa>
12: 60e2 ld ra,24(sp)
14: 208405d3 fmv.s fa1,fs0
18: 2422 fld fs0,8(sp)
1a: 6105 addi sp,sp,32
1c: 00000317 auipc t1,0x0
1c: R_RISCV_CALL_PLT result_float_float
20: 00030067 jr t1 # 1c <pow_float_float+0x1c>
tricore#
00000000 <pow_float_float>:
0: 02 58 mov %d8,%d5
2: 6d 00 00 00 call 2 <pow_float_float+0x2>
2: R_TRICORE_24REL powf
6: 0b 28 10 48 mov %e4,%d8,%d2
a: 1d 00 00 00 j a <pow_float_float+0xa>
a: R_TRICORE_24REL result_float_float
x86#
00000000 <pow_float_float>:
0: 83 ec 28 sub $0x28,%esp
3: d9 44 24 30 flds 0x30(%esp)
7: d9 14 24 fsts (%esp)
a: d9 5c 24 18 fstps 0x18(%esp)
e: ff 74 24 2c push 0x2c(%esp)
12: e8 fc ff ff ff call 13 <pow_float_float+0x13>
13: R_386_PC32 powf
17: d9 44 24 1c flds 0x1c(%esp)
1b: d9 5c 24 34 fstps 0x34(%esp)
1f: d9 5c 24 30 fstps 0x30(%esp)
23: 83 c4 2c add $0x2c,%esp
26: e9 fc ff ff ff jmp 27 <pow_float_float+0x27>
27: R_386_PC32 result_float_float
x86_64#
0000000000000000 <pow_float_float>:
0: 48 83 ec 18 sub $0x18,%rsp
4: f3 0f 11 4c 24 0c movss %xmm1,0xc(%rsp)
a: e8 00 00 00 00 call f <pow_float_float+0xf>
b: R_X86_64_PLT32 powf-0x4
f: f3 0f 10 4c 24 0c movss 0xc(%rsp),%xmm1
15: 48 83 c4 18 add $0x18,%rsp
19: e9 00 00 00 00 jmp 1e <.LC8+0x2>
1a: R_X86_64_PLT32 result_float_float-0x4
pow_int_int#
STENCIL void pow_int_int(int arg1, int arg2) {
result_int_int(aux_ipow(arg1, arg2), arg2);
}
arm64#
0000000000000000 <pow_int_int>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 2a0103e4 mov w4, w1
8: 910003fd mov x29, sp
c: 94000000 bl 0 <pow_int_int>
c: R_AARCH64_CALL26 aux_ipow
10: a8c17bfd ldp x29, x30, [sp], #16
14: 2a0403e1 mov w1, w4
18: 14000000 b 0 <result_int_int>
18: R_AARCH64_JUMP26 result_int_int
armv6#
00000000 <pow_int_int>:
0: e1a02001 mov r2, r1
4: e92d4010 push {r4, lr}
8: ebfffffe bl 0 <pow_int_int>
8: R_ARM_CALL aux_ipow
c: e8bd4010 pop {r4, lr}
10: e1a01002 mov r1, r2
14: eafffffe b 0 <result_int_int>
14: R_ARM_JUMP24 result_int_int
armv7#
00000000 <pow_int_int>:
0: e92d4010 push {r4, lr}
4: e1a02001 mov r2, r1
8: ebfffffe bl 0 <pow_int_int>
8: R_ARM_CALL aux_ipow
c: e8bd4010 pop {r4, lr}
10: e1a01002 mov r1, r2
14: eafffffe b 0 <result_int_int>
14: R_ARM_JUMP24 result_int_int
armv7mthumb#
00000000 <pow_int_int>:
0: b510 push {r4, lr}
2: 460c mov r4, r1
4: f7ff fffe bl 0 <pow_int_int>
4: R_ARM_THM_CALL aux_ipow
8: 4621 mov r1, r4
a: e8bd 4010 ldmia.w sp!, {r4, lr}
e: f7ff bffe b.w 0 <result_int_int>
e: R_ARM_THM_JUMP24 result_int_int
12: bf00 nop
armv7mthumb_fpv5#
00000000 <pow_int_int>:
0: b510 push {r4, lr}
2: 460c mov r4, r1
4: f7ff fffe bl 0 <pow_int_int>
4: R_ARM_THM_CALL aux_ipow
8: 4621 mov r1, r4
a: e8bd 4010 ldmia.w sp!, {r4, lr}
e: f7ff bffe b.w 0 <result_int_int>
e: R_ARM_THM_JUMP24 result_int_int
12: bf00 nop
armv7thumb#
00000000 <pow_int_int>:
0: b510 push {r4, lr}
2: 460c mov r4, r1
4: f7ff fffe bl 0 <pow_int_int>
4: R_ARM_THM_CALL aux_ipow
8: 4621 mov r1, r4
a: e8bd 4010 ldmia.w sp!, {r4, lr}
e: f7ff bffe b.w 0 <result_int_int>
e: R_ARM_THM_JUMP24 result_int_int
12: bf00 nop
armv81mthumb#
00000000 <pow_int_int>:
0: b510 push {r4, lr}
2: 460c mov r4, r1
4: f7ff fffe bl 0 <pow_int_int>
4: R_ARM_THM_CALL aux_ipow
8: 4621 mov r1, r4
a: e8bd 4010 ldmia.w sp!, {r4, lr}
e: f7ff bffe b.w 0 <result_int_int>
e: R_ARM_THM_JUMP24 result_int_int
12: bf00 nop
riscv32#
00000000 <pow_int_int>:
0: 1101 addi sp,sp,-32
2: ce06 sw ra,28(sp)
4: c62e sw a1,12(sp)
6: 00000097 auipc ra,0x0
6: R_RISCV_CALL_PLT aux_ipow
a: 000080e7 jalr ra # 6 <pow_int_int+0x6>
e: 45b2 lw a1,12(sp)
10: 40f2 lw ra,28(sp)
12: 6105 addi sp,sp,32
14: 00000317 auipc t1,0x0
14: R_RISCV_CALL_PLT result_int_int
18: 00030067 jr t1 # 14 <pow_int_int+0x14>
riscv64#
0000000000000000 <pow_int_int>:
0: 1141 addi sp,sp,-16
2: e022 sd s0,0(sp)
4: e406 sd ra,8(sp)
6: 842e mv s0,a1
8: 00000097 auipc ra,0x0
8: R_RISCV_CALL_PLT aux_ipow
c: 000080e7 jalr ra # 8 <pow_int_int+0x8>
10: 85a2 mv a1,s0
12: 6402 ld s0,0(sp)
14: 60a2 ld ra,8(sp)
16: 0141 addi sp,sp,16
18: 00000317 auipc t1,0x0
18: R_RISCV_CALL_PLT result_int_int
1c: 00030067 jr t1 # 18 <pow_int_int+0x18>
tricore#
00000000 <pow_int_int>:
0: 02 58 mov %d8,%d5
2: 6d 00 00 00 call 2 <pow_int_int+0x2>
2: R_TRICORE_24REL aux_ipow
6: 0b 28 10 48 mov %e4,%d8,%d2
a: 1d 00 00 00 j a <pow_int_int+0xa>
a: R_TRICORE_24REL result_int_int
x86#
00000000 <pow_int_int>:
0: 53 push %ebx
1: 83 ec 08 sub $0x8,%esp
4: 8b 5c 24 14 mov 0x14(%esp),%ebx
8: 53 push %ebx
9: ff 74 24 14 push 0x14(%esp)
d: e8 fc ff ff ff call e <pow_int_int+0xe>
e: R_386_PC32 aux_ipow
12: 89 5c 24 1c mov %ebx,0x1c(%esp)
16: 89 44 24 18 mov %eax,0x18(%esp)
1a: 83 c4 10 add $0x10,%esp
1d: 5b pop %ebx
1e: e9 fc ff ff ff jmp 1f <pow_int_int+0x1f>
1f: R_386_PC32 result_int_int
x86_64#
0000000000000000 <pow_int_int>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 89 f2 mov %esi,%edx
6: e8 00 00 00 00 call b <pow_int_int+0xb>
7: R_X86_64_PLT32 aux_ipow-0x4
b: 89 d6 mov %edx,%esi
d: 48 83 c4 08 add $0x8,%rsp
11: 89 c7 mov %eax,%edi
13: e9 00 00 00 00 jmp 18 <.LC27>
14: R_X86_64_PLT32 result_int_int-0x4