Array reduction and linear algebra stencils#
dot_intarr_intarr#
STENCIL void dot_intarr_intarr(void) {
// Dot product of int array and int array
*(int *)REF(ref_out) = aux_arr_dot_int_int(REF(ref_arg0), REF(ref_arg1), *(int *)REF(ref_arg2));
result_int_ref();
}
arm64#
0000000000000000 <dot_intarr_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000001 adrp x1, 0 <ref_arg1>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <dot_intarr_intarr>
20: R_AARCH64_CALL26 aux_arr_dot_int_int
24: a8c17bfd ldp x29, x30, [sp], #16
28: 90000001 adrp x1, 0 <ref_out>
28: R_AARCH64_ADR_PREL_PG_HI21 ref_out
2c: b9000020 str w0, [x1]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_int_ref>
30: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <dot_intarr_intarr>:
0: e59f3020 ldr r3, [pc, #32] @ 28 <dot_intarr_intarr+0x28>
4: e92d4010 push {r4, lr}
8: e5932000 ldr r2, [r3]
c: e59f1018 ldr r1, [pc, #24] @ 2c <dot_intarr_intarr+0x2c>
10: e59f0018 ldr r0, [pc, #24] @ 30 <dot_intarr_intarr+0x30>
14: ebfffffe bl 0 <dot_intarr_intarr>
14: R_ARM_CALL aux_arr_dot_int_int
18: e59f3014 ldr r3, [pc, #20] @ 34 <dot_intarr_intarr+0x34>
1c: e8bd4010 pop {r4, lr}
20: e5830000 str r0, [r3]
24: eafffffe b 0 <result_int_ref>
24: R_ARM_JUMP24 result_int_ref
...
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
34: R_ARM_ABS32 ref_out
armv7#
00000000 <dot_intarr_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg2
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg2
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_arg1
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_arg1
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <dot_intarr_intarr>
20: R_ARM_CALL aux_arr_dot_int_int
24: e3003000 movw r3, #0
24: R_ARM_MOVW_ABS_NC ref_out
28: e3403000 movt r3, #0
28: R_ARM_MOVT_ABS ref_out
2c: e8bd4010 pop {r4, lr}
30: e5830000 str r0, [r3]
34: eafffffe b 0 <result_int_ref>
34: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <dot_intarr_intarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_intarr_intarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_intarr_intarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_intarr_intarr+0x24>)
a: f7ff fffe bl 0 <dot_intarr_intarr>
a: R_ARM_THM_CALL aux_arr_dot_int_int
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_intarr_intarr+0x28>)
10: 6018 str r0, [r3, #0]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_int_ref>
16: R_ARM_THM_JUMP24 result_int_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <dot_intarr_intarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_intarr_intarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_intarr_intarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_intarr_intarr+0x24>)
a: f7ff fffe bl 0 <dot_intarr_intarr>
a: R_ARM_THM_CALL aux_arr_dot_int_int
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_intarr_intarr+0x28>)
10: 6018 str r0, [r3, #0]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_int_ref>
16: R_ARM_THM_JUMP24 result_int_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <dot_intarr_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg2
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg2
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg1
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_arg1
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <dot_intarr_intarr>
1c: R_ARM_THM_CALL aux_arr_dot_int_int
20: f240 0300 movw r3, #0
20: R_ARM_THM_MOVW_ABS_NC ref_out
24: f2c0 0300 movt r3, #0
24: R_ARM_THM_MOVT_ABS ref_out
28: 6018 str r0, [r3, #0]
2a: e8bd 4008 ldmia.w sp!, {r3, lr}
2e: f7ff bffe b.w 0 <result_int_ref>
2e: R_ARM_THM_JUMP24 result_int_ref
32: bf00 nop
armv81mthumb#
00000000 <dot_intarr_intarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_intarr_intarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_intarr_intarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_intarr_intarr+0x24>)
a: f7ff fffe bl 0 <dot_intarr_intarr>
a: R_ARM_THM_CALL aux_arr_dot_int_int
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_intarr_intarr+0x28>)
10: 6018 str r0, [r3, #0]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_int_ref>
16: R_ARM_THM_JUMP24 result_int_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
riscv32#
00000000 <dot_intarr_intarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg2
4: 00062603 lw a2,0(a2) # 0 <dot_intarr_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_int_int
20: 000080e7 jalr ra # 1c <dot_intarr_intarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a023 sw a0,0(a5) # 26 <dot_intarr_intarr+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_int_ref
34: 00030067 jr t1 # 30 <dot_intarr_intarr+0x30>
riscv64#
0000000000000000 <dot_intarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00062603 lw a2,0(a2) # 2 <dot_intarr_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_int_int
20: 000080e7 jalr ra # 1c <dot_intarr_intarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a023 sw a0,0(a5) # 26 <dot_intarr_intarr+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_int_ref
34: 00030067 jr t1 # 30 <dot_intarr_intarr+0x30>
tricore#
00000000 <dot_intarr_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <dot_intarr_intarr>>
4: R_TRICORE_LO2 ref_arg2
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <dot_intarr_intarr>>
10: R_TRICORE_LO2 ref_arg1
14: d9 44 00 00 lea %a4,[%a4]0 <0 <dot_intarr_intarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <dot_intarr_intarr+0x18>
18: R_TRICORE_24REL aux_arr_dot_int_int
1c: 91 00 00 20 movh.a %a2,0
1c: R_TRICORE_HIADJ ref_out
20: 59 22 00 00 st.w [%a2]0 <0 <dot_intarr_intarr>>,%d2
20: R_TRICORE_LO2 ref_out
24: 1d 00 00 00 j 24 <dot_intarr_intarr+0x24>
24: R_TRICORE_24REL result_int_ref
x86#
00000000 <dot_intarr_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg2
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg1
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <dot_intarr_intarr+0x14>
14: R_386_PC32 aux_arr_dot_int_int
18: a3 00 00 00 00 mov %eax,0x0
19: R_386_32 ref_out
1d: 83 c4 18 add $0x18,%esp
20: e9 fc ff ff ff jmp 21 <dot_intarr_intarr+0x21>
21: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <dot_intarr_intarr>:
0: 53 push %rbx
1: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 8 <dot_intarr_intarr+0x8>
4: R_X86_64_PC32 ref_arg2-0x4
8: 8b 10 mov (%rax),%edx
a: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 11 <dot_intarr_intarr+0x11>
d: R_X86_64_PC32 ref_arg1-0x4
11: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 18 <dot_intarr_intarr+0x18>
14: R_X86_64_PC32 ref_arg0-0x4
18: e8 00 00 00 00 call 1d <dot_intarr_intarr+0x1d>
19: R_X86_64_PLT32 aux_arr_dot_int_int-0x4
1d: 48 8d 1d 00 00 00 00 lea 0x0(%rip),%rbx # 24 <dot_intarr_intarr+0x24>
20: R_X86_64_PC32 ref_out-0x4
24: 89 03 mov %eax,(%rbx)
26: 5b pop %rbx
27: e9 00 00 00 00 jmp 2c <.LC31>
28: R_X86_64_PLT32 result_int_ref-0x4
matvec_intarr_intarr#
STENCIL void matvec_intarr_intarr(void) {
// Product of a row-major m x n matrix and a vector of n elements
aux_arr_matvec_int_int(REF(ref_arg0), REF(ref_arg1), REF(ref_out), *(int *)REF(ref_arg2), *(int *)REF(ref_arg3));
result_int_ref();
}
arm64#
0000000000000000 <matvec_intarr_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000000 adrp x0, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400064 ldr w4, [x3]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg3
14: 90000002 adrp x2, 0 <ref_out>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_out
18: b9400003 ldr w3, [x0]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
1c: 91000042 add x2, x2, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_out
20: 90000001 adrp x1, 0 <ref_arg1>
20: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
24: 90000000 adrp x0, 0 <ref_arg0>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
28: 91000021 add x1, x1, #0x0
28: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <matvec_intarr_intarr>
30: R_AARCH64_CALL26 aux_arr_matvec_int_int
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_int_ref>
38: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <matvec_intarr_intarr>:
0: e59f1030 ldr r1, [pc, #48] @ 38 <matvec_intarr_intarr+0x38>
4: e59f3030 ldr r3, [pc, #48] @ 3c <matvec_intarr_intarr+0x3c>
8: e52de004 push {lr} @ (str lr, [sp, #-4]!)
c: e24dd00c sub sp, sp, #12
10: e591c000 ldr ip, [r1]
14: e5933000 ldr r3, [r3]
18: e59f2020 ldr r2, [pc, #32] @ 40 <matvec_intarr_intarr+0x40>
1c: e59f1020 ldr r1, [pc, #32] @ 44 <matvec_intarr_intarr+0x44>
20: e59f0020 ldr r0, [pc, #32] @ 48 <matvec_intarr_intarr+0x48>
24: e58dc000 str ip, [sp]
28: ebfffffe bl 0 <matvec_intarr_intarr>
28: R_ARM_CALL aux_arr_matvec_int_int
2c: e28dd00c add sp, sp, #12
30: e49de004 pop {lr} @ (ldr lr, [sp], #4)
34: eafffffe b 0 <result_int_ref>
34: R_ARM_JUMP24 result_int_ref
...
38: R_ARM_ABS32 ref_arg3
3c: R_ARM_ABS32 ref_arg2
40: R_ARM_ABS32 ref_out
44: R_ARM_ABS32 ref_arg1
48: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matvec_intarr_intarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3001000 movw r1, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e3401000 movt r1, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg2
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg2
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e591c000 ldr ip, [r1]
24: e3000000 movw r0, #0
24: R_ARM_MOVW_ABS_NC ref_arg0
28: e3400000 movt r0, #0
28: R_ARM_MOVT_ABS ref_arg0
2c: e5933000 ldr r3, [r3]
30: e3001000 movw r1, #0
30: R_ARM_MOVW_ABS_NC ref_arg1
34: e3401000 movt r1, #0
34: R_ARM_MOVT_ABS ref_arg1
38: e58dc000 str ip, [sp]
3c: ebfffffe bl 0 <matvec_intarr_intarr>
3c: R_ARM_CALL aux_arr_matvec_int_int
40: e28dd00c add sp, sp, #12
44: e49de004 pop {lr} @ (ldr lr, [sp], #4)
48: eafffffe b 0 <result_int_ref>
48: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <matvec_intarr_intarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_intarr_intarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_intarr_intarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: 681b ldr r3, [r3, #0]
a: 4a08 ldr r2, [pc, #32] @ (2c <matvec_intarr_intarr+0x2c>)
c: 4908 ldr r1, [pc, #32] @ (30 <matvec_intarr_intarr+0x30>)
e: 4809 ldr r0, [pc, #36] @ (34 <matvec_intarr_intarr+0x34>)
10: b082 sub sp, #8
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_intarr_intarr>
14: R_ARM_THM_CALL aux_arr_matvec_int_int
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_int_ref>
1e: R_ARM_THM_JUMP24 result_int_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matvec_intarr_intarr>:
0: 4808 ldr r0, [pc, #32] @ (24 <matvec_intarr_intarr+0x24>)
2: 4b09 ldr r3, [pc, #36] @ (28 <matvec_intarr_intarr+0x28>)
4: 4a09 ldr r2, [pc, #36] @ (2c <matvec_intarr_intarr+0x2c>)
6: 681b ldr r3, [r3, #0]
8: 4909 ldr r1, [pc, #36] @ (30 <matvec_intarr_intarr+0x30>)
a: b510 push {r4, lr}
c: 6804 ldr r4, [r0, #0]
e: b082 sub sp, #8
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_intarr_intarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_intarr_intarr>
14: R_ARM_THM_CALL aux_arr_matvec_int_int
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_int_ref>
1e: R_ARM_THM_JUMP24 result_int_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matvec_intarr_intarr>:
0: b510 push {r4, lr}
2: f240 0100 movw r1, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0100 movt r1, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0300 movw r3, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0300 movt r3, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: 680c ldr r4, [r1, #0]
1e: f240 0000 movw r0, #0
1e: R_ARM_THM_MOVW_ABS_NC ref_arg0
22: f2c0 0000 movt r0, #0
22: R_ARM_THM_MOVT_ABS ref_arg0
26: 681b ldr r3, [r3, #0]
28: f240 0100 movw r1, #0
28: R_ARM_THM_MOVW_ABS_NC ref_arg1
2c: f2c0 0100 movt r1, #0
2c: R_ARM_THM_MOVT_ABS ref_arg1
30: 9400 str r4, [sp, #0]
32: f7ff fffe bl 0 <matvec_intarr_intarr>
32: R_ARM_THM_CALL aux_arr_matvec_int_int
36: b002 add sp, #8
38: e8bd 4010 ldmia.w sp!, {r4, lr}
3c: f7ff bffe b.w 0 <result_int_ref>
3c: R_ARM_THM_JUMP24 result_int_ref
armv81mthumb#
00000000 <matvec_intarr_intarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_intarr_intarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_intarr_intarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: b082 sub sp, #8
a: 681b ldr r3, [r3, #0]
c: 4a07 ldr r2, [pc, #28] @ (2c <matvec_intarr_intarr+0x2c>)
e: 4908 ldr r1, [pc, #32] @ (30 <matvec_intarr_intarr+0x30>)
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_intarr_intarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_intarr_intarr>
14: R_ARM_THM_CALL aux_arr_matvec_int_int
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_int_ref>
1e: R_ARM_THM_JUMP24 result_int_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matvec_intarr_intarr>:
0: 00000717 auipc a4,0x0
0: R_RISCV_PCREL_HI20 ref_arg3
4: 00072703 lw a4,0(a4) # 0 <matvec_intarr_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000697 auipc a3,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0006a683 lw a3,0(a3) # 8 <matvec_intarr_intarr+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_int_int
30: 000080e7 jalr ra # 2c <matvec_intarr_intarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_int_ref
3c: 00030067 jr t1 # 38 <matvec_intarr_intarr+0x38>
riscv64#
0000000000000000 <matvec_intarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00072703 lw a4,0(a4) # 2 <matvec_intarr_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 0006a683 lw a3,0(a3) # a <matvec_intarr_intarr+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_int_int
30: 000080e7 jalr ra # 2c <matvec_intarr_intarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_int_ref
3c: 00030067 jr t1 # 38 <matvec_intarr_intarr+0x38>
tricore#
00000000 <matvec_intarr_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <matvec_intarr_intarr>>
4: R_TRICORE_LO2 ref_arg3
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg2
c: 19 24 00 00 ld.w %d4,[%a2]0 <0 <matvec_intarr_intarr>>
c: R_TRICORE_LO2 ref_arg2
10: 91 00 00 60 movh.a %a6,0
10: R_TRICORE_HIADJ ref_out
14: 91 00 00 50 movh.a %a5,0
14: R_TRICORE_HIADJ ref_arg1
18: 91 00 00 40 movh.a %a4,0
18: R_TRICORE_HIADJ ref_arg0
1c: d9 66 00 00 lea %a6,[%a6]0 <0 <matvec_intarr_intarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 55 00 00 lea %a5,[%a5]0 <0 <matvec_intarr_intarr>>
20: R_TRICORE_LO2 ref_arg1
24: d9 44 00 00 lea %a4,[%a4]0 <0 <matvec_intarr_intarr>>
24: R_TRICORE_LO2 ref_arg0
28: 6d 00 00 00 call 28 <matvec_intarr_intarr+0x28>
28: R_TRICORE_24REL aux_arr_matvec_int_int
2c: 1d 00 00 00 j 2c <matvec_intarr_intarr+0x2c>
2c: R_TRICORE_24REL result_int_ref
x86#
00000000 <matvec_intarr_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg3
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg2
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_out
14: 68 00 00 00 00 push $0x0
15: R_386_32 ref_arg1
19: 68 00 00 00 00 push $0x0
1a: R_386_32 ref_arg0
1e: e8 fc ff ff ff call 1f <matvec_intarr_intarr+0x1f>
1f: R_386_PC32 aux_arr_matvec_int_int
23: 83 c4 20 add $0x20,%esp
26: e9 fc ff ff ff jmp 27 <matvec_intarr_intarr+0x27>
27: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <matvec_intarr_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <matvec_intarr_intarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <matvec_intarr_intarr+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: 44 8b 00 mov (%rax),%r8d
15: 8b 09 mov (%rcx),%ecx
17: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 1e <matvec_intarr_intarr+0x1e>
1a: R_X86_64_PC32 ref_out-0x4
1e: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 25 <matvec_intarr_intarr+0x25>
21: R_X86_64_PC32 ref_arg1-0x4
25: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 2c <matvec_intarr_intarr+0x2c>
28: R_X86_64_PC32 ref_arg0-0x4
2c: e8 00 00 00 00 call 31 <matvec_intarr_intarr+0x31>
2d: R_X86_64_PLT32 aux_arr_matvec_int_int-0x4
31: 48 83 c4 08 add $0x8,%rsp
35: e9 00 00 00 00 jmp 3a <.LC0+0x2>
36: R_X86_64_PLT32 result_int_ref-0x4
matmul_intarr_intarr#
STENCIL void matmul_intarr_intarr(void) {
// Matrix product of a row-major m x k and a k x n matrix,
// the dimensions are passed as int array [m, k, n]
aux_arr_matmul_int_int(REF(ref_arg0), REF(ref_arg1), REF(ref_out), REF(ref_arg2));
result_int_ref();
}
arm64#
0000000000000000 <matmul_intarr_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000002 adrp x2, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000063 add x3, x3, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
14: 91000042 add x2, x2, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000001 adrp x1, 0 <ref_arg1>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
1c: 90000000 adrp x0, 0 <ref_arg0>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
20: 91000021 add x1, x1, #0x0
20: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
24: 91000000 add x0, x0, #0x0
24: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
28: 94000000 bl 0 <matmul_intarr_intarr>
28: R_AARCH64_CALL26 aux_arr_matmul_int_int
2c: a8c17bfd ldp x29, x30, [sp], #16
30: 14000000 b 0 <result_int_ref>
30: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <matmul_intarr_intarr>:
0: e92d4010 push {r4, lr}
4: e59f3014 ldr r3, [pc, #20] @ 20 <matmul_intarr_intarr+0x20>
8: e59f2014 ldr r2, [pc, #20] @ 24 <matmul_intarr_intarr+0x24>
c: e59f1014 ldr r1, [pc, #20] @ 28 <matmul_intarr_intarr+0x28>
10: e59f0014 ldr r0, [pc, #20] @ 2c <matmul_intarr_intarr+0x2c>
14: ebfffffe bl 0 <matmul_intarr_intarr>
14: R_ARM_CALL aux_arr_matmul_int_int
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_int_ref>
1c: R_ARM_JUMP24 result_int_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg1
2c: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matmul_intarr_intarr>:
0: e92d4010 push {r4, lr}
4: e3003000 movw r3, #0
4: R_ARM_MOVW_ABS_NC ref_arg2
8: e3403000 movt r3, #0
8: R_ARM_MOVT_ABS ref_arg2
c: e3002000 movw r2, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3402000 movt r2, #0
10: R_ARM_MOVT_ABS ref_out
14: e3001000 movw r1, #0
14: R_ARM_MOVW_ABS_NC ref_arg1
18: e3401000 movt r1, #0
18: R_ARM_MOVT_ABS ref_arg1
1c: e3000000 movw r0, #0
1c: R_ARM_MOVW_ABS_NC ref_arg0
20: e3400000 movt r0, #0
20: R_ARM_MOVT_ABS ref_arg0
24: ebfffffe bl 0 <matmul_intarr_intarr>
24: R_ARM_CALL aux_arr_matmul_int_int
28: e8bd4010 pop {r4, lr}
2c: eafffffe b 0 <result_int_ref>
2c: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <matmul_intarr_intarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_intarr_intarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_intarr_intarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_intarr_intarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_intarr_intarr+0x24>)
a: f7ff fffe bl 0 <matmul_intarr_intarr>
a: R_ARM_THM_CALL aux_arr_matmul_int_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matmul_intarr_intarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_intarr_intarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_intarr_intarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_intarr_intarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_intarr_intarr+0x24>)
a: f7ff fffe bl 0 <matmul_intarr_intarr>
a: R_ARM_THM_CALL aux_arr_matmul_int_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matmul_intarr_intarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_out
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_out
a: f240 0300 movw r3, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg2
e: f2c0 0300 movt r3, #0
e: R_ARM_THM_MOVT_ABS ref_arg2
12: f240 0100 movw r1, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg1
16: f2c0 0100 movt r1, #0
16: R_ARM_THM_MOVT_ABS ref_arg1
1a: f240 0000 movw r0, #0
1a: R_ARM_THM_MOVW_ABS_NC ref_arg0
1e: f2c0 0000 movt r0, #0
1e: R_ARM_THM_MOVT_ABS ref_arg0
22: f7ff fffe bl 0 <matmul_intarr_intarr>
22: R_ARM_THM_CALL aux_arr_matmul_int_int
26: e8bd 4008 ldmia.w sp!, {r3, lr}
2a: f7ff bffe b.w 0 <result_int_ref>
2a: R_ARM_THM_JUMP24 result_int_ref
2e: bf00 nop
armv81mthumb#
00000000 <matmul_intarr_intarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_intarr_intarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_intarr_intarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_intarr_intarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_intarr_intarr+0x24>)
a: f7ff fffe bl 0 <matmul_intarr_intarr>
a: R_ARM_THM_CALL aux_arr_matmul_int_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matmul_intarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: c606 sw ra,12(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_int_int
28: 000080e7 jalr ra # 24 <matmul_intarr_intarr+0x24>
2c: 40b2 lw ra,12(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_int_ref
34: 00030067 jr t1 # 30 <matmul_intarr_intarr+0x30>
riscv64#
0000000000000000 <matmul_intarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: e406 sd ra,8(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_int_int
28: 000080e7 jalr ra # 24 <matmul_intarr_intarr+0x24>
2c: 60a2 ld ra,8(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_int_ref
34: 00030067 jr t1 # 30 <matmul_intarr_intarr+0x30>
tricore#
00000000 <matmul_intarr_intarr>:
0: 91 00 00 70 movh.a %a7,0
0: R_TRICORE_HIADJ ref_arg2
4: 91 00 00 60 movh.a %a6,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 77 00 00 lea %a7,[%a7]0 <0 <matmul_intarr_intarr>>
10: R_TRICORE_LO2 ref_arg2
14: d9 66 00 00 lea %a6,[%a6]0 <0 <matmul_intarr_intarr>>
14: R_TRICORE_LO2 ref_out
18: d9 55 00 00 lea %a5,[%a5]0 <0 <matmul_intarr_intarr>>
18: R_TRICORE_LO2 ref_arg1
1c: d9 44 00 00 lea %a4,[%a4]0 <0 <matmul_intarr_intarr>>
1c: R_TRICORE_LO2 ref_arg0
20: 6d 00 00 00 call 20 <matmul_intarr_intarr+0x20>
20: R_TRICORE_24REL aux_arr_matmul_int_int
24: 1d 00 00 00 j 24 <matmul_intarr_intarr+0x24>
24: R_TRICORE_24REL result_int_ref
x86#
00000000 <matmul_intarr_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg2
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg1
12: 68 00 00 00 00 push $0x0
13: R_386_32 ref_arg0
17: e8 fc ff ff ff call 18 <matmul_intarr_intarr+0x18>
18: R_386_PC32 aux_arr_matmul_int_int
1c: 83 c4 1c add $0x1c,%esp
1f: e9 fc ff ff ff jmp 20 <matmul_intarr_intarr+0x20>
20: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <matmul_intarr_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # b <matmul_intarr_intarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 12 <matmul_intarr_intarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 19 <matmul_intarr_intarr+0x19>
15: R_X86_64_PC32 ref_arg1-0x4
19: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 20 <matmul_intarr_intarr+0x20>
1c: R_X86_64_PC32 ref_arg0-0x4
20: e8 00 00 00 00 call 25 <matmul_intarr_intarr+0x25>
21: R_X86_64_PLT32 aux_arr_matmul_int_int-0x4
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_int_ref-0x4
dot_intarr_floatarr#
STENCIL void dot_intarr_floatarr(void) {
// Dot product of int array and float array
*(float *)REF(ref_out) = aux_arr_dot_int_float(REF(ref_arg0), REF(ref_arg1), *(int *)REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <dot_intarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000001 adrp x1, 0 <ref_arg1>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <dot_intarr_floatarr>
20: R_AARCH64_CALL26 aux_arr_dot_int_float
24: 90000000 adrp x0, 0 <ref_out>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_out
28: a8c17bfd ldp x29, x30, [sp], #16
2c: bd000000 str s0, [x0]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <dot_intarr_floatarr>:
0: e59f3020 ldr r3, [pc, #32] @ 28 <dot_intarr_floatarr+0x28>
4: e92d4010 push {r4, lr}
8: e5932000 ldr r2, [r3]
c: e59f1018 ldr r1, [pc, #24] @ 2c <dot_intarr_floatarr+0x2c>
10: e59f0018 ldr r0, [pc, #24] @ 30 <dot_intarr_floatarr+0x30>
14: ebfffffe bl 0 <dot_intarr_floatarr>
14: R_ARM_CALL aux_arr_dot_int_float
18: e59f3014 ldr r3, [pc, #20] @ 34 <dot_intarr_floatarr+0x34>
1c: e8bd4010 pop {r4, lr}
20: ed830a00 vstr s0, [r3]
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
...
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
34: R_ARM_ABS32 ref_out
armv7#
00000000 <dot_intarr_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg2
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg2
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_arg1
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_arg1
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <dot_intarr_floatarr>
20: R_ARM_CALL aux_arr_dot_int_float
24: e3003000 movw r3, #0
24: R_ARM_MOVW_ABS_NC ref_out
28: e3403000 movt r3, #0
28: R_ARM_MOVT_ABS ref_out
2c: e8bd4010 pop {r4, lr}
30: ed830a00 vstr s0, [r3]
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <dot_intarr_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_intarr_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_intarr_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_intarr_floatarr+0x24>)
a: f7ff fffe bl 0 <dot_intarr_floatarr>
a: R_ARM_THM_CALL aux_arr_dot_int_float
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_intarr_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <dot_intarr_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_intarr_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_intarr_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_intarr_floatarr+0x24>)
a: f7ff fffe bl 0 <dot_intarr_floatarr>
a: R_ARM_THM_CALL aux_arr_dot_int_float
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_intarr_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <dot_intarr_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg2
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg2
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg1
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_arg1
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <dot_intarr_floatarr>
1c: R_ARM_THM_CALL aux_arr_dot_int_float
20: f240 0300 movw r3, #0
20: R_ARM_THM_MOVW_ABS_NC ref_out
24: f2c0 0300 movt r3, #0
24: R_ARM_THM_MOVT_ABS ref_out
28: ed83 0a00 vstr s0, [r3]
2c: e8bd 4008 ldmia.w sp!, {r3, lr}
30: f7ff bffe b.w 0 <result_float_ref>
30: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <dot_intarr_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_intarr_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_intarr_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_intarr_floatarr+0x24>)
a: f7ff fffe bl 0 <dot_intarr_floatarr>
a: R_ARM_THM_CALL aux_arr_dot_int_float
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_intarr_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
riscv32#
00000000 <dot_intarr_floatarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg2
4: 00062603 lw a2,0(a2) # 0 <dot_intarr_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_int_float
20: 000080e7 jalr ra # 1c <dot_intarr_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00078793 mv a5,a5
2a: R_RISCV_PCREL_LO12_I .L0
2e: e388 fsw fa0,0(a5)
30: 0141 addi sp,sp,16
32: 00000317 auipc t1,0x0
32: R_RISCV_CALL_PLT result_float_ref
36: 00030067 jr t1 # 32 <dot_intarr_floatarr+0x32>
riscv64#
0000000000000000 <dot_intarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00062603 lw a2,0(a2) # 2 <dot_intarr_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_int_float
20: 000080e7 jalr ra # 1c <dot_intarr_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a027 fsw fa0,0(a5) # 26 <dot_intarr_floatarr+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <dot_intarr_floatarr+0x30>
tricore#
00000000 <dot_intarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <dot_intarr_floatarr>>
4: R_TRICORE_LO2 ref_arg2
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <dot_intarr_floatarr>>
10: R_TRICORE_LO2 ref_arg1
14: d9 44 00 00 lea %a4,[%a4]0 <0 <dot_intarr_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <dot_intarr_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_dot_int_float
1c: 91 00 00 20 movh.a %a2,0
1c: R_TRICORE_HIADJ ref_out
20: d9 22 00 00 lea %a2,[%a2]0 <0 <dot_intarr_floatarr>>
20: R_TRICORE_LO2 ref_out
24: 74 22 st.w [%a2],%d2
26: 1d 00 00 00 j 26 <dot_intarr_floatarr+0x26>
26: R_TRICORE_24REL result_float_ref
x86#
00000000 <dot_intarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg2
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg1
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <dot_intarr_floatarr+0x14>
14: R_386_PC32 aux_arr_dot_int_float
18: d9 1d 00 00 00 00 fstps 0x0
1a: R_386_32 ref_out
1e: 83 c4 18 add $0x18,%esp
21: e9 fc ff ff ff jmp 22 <dot_intarr_floatarr+0x22>
22: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <dot_intarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <dot_intarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 8b 10 mov (%rax),%edx
d: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 14 <dot_intarr_floatarr+0x14>
10: R_X86_64_PC32 ref_arg1-0x4
14: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1b <dot_intarr_floatarr+0x1b>
17: R_X86_64_PC32 ref_arg0-0x4
1b: e8 00 00 00 00 call 20 <dot_intarr_floatarr+0x20>
1c: R_X86_64_PLT32 aux_arr_dot_int_float-0x4
20: 4c 8d 1d 00 00 00 00 lea 0x0(%rip),%r11 # 27 <dot_intarr_floatarr+0x27>
23: R_X86_64_PC32 ref_out-0x4
27: f3 41 0f 11 03 movss %xmm0,(%r11)
2c: 48 83 c4 08 add $0x8,%rsp
30: e9 00 00 00 00 jmp 35 <.LC1+0x1>
31: R_X86_64_PLT32 result_float_ref-0x4
matvec_intarr_floatarr#
STENCIL void matvec_intarr_floatarr(void) {
// Product of a row-major m x n matrix and a vector of n elements
aux_arr_matvec_int_float(REF(ref_arg0), REF(ref_arg1), REF(ref_out), *(int *)REF(ref_arg2), *(int *)REF(ref_arg3));
result_float_ref();
}
arm64#
0000000000000000 <matvec_intarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000000 adrp x0, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400064 ldr w4, [x3]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg3
14: 90000002 adrp x2, 0 <ref_out>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_out
18: b9400003 ldr w3, [x0]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
1c: 91000042 add x2, x2, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_out
20: 90000001 adrp x1, 0 <ref_arg1>
20: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
24: 90000000 adrp x0, 0 <ref_arg0>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
28: 91000021 add x1, x1, #0x0
28: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <matvec_intarr_floatarr>
30: R_AARCH64_CALL26 aux_arr_matvec_int_float
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <matvec_intarr_floatarr>:
0: e59f1030 ldr r1, [pc, #48] @ 38 <matvec_intarr_floatarr+0x38>
4: e59f3030 ldr r3, [pc, #48] @ 3c <matvec_intarr_floatarr+0x3c>
8: e52de004 push {lr} @ (str lr, [sp, #-4]!)
c: e24dd00c sub sp, sp, #12
10: e591c000 ldr ip, [r1]
14: e5933000 ldr r3, [r3]
18: e59f2020 ldr r2, [pc, #32] @ 40 <matvec_intarr_floatarr+0x40>
1c: e59f1020 ldr r1, [pc, #32] @ 44 <matvec_intarr_floatarr+0x44>
20: e59f0020 ldr r0, [pc, #32] @ 48 <matvec_intarr_floatarr+0x48>
24: e58dc000 str ip, [sp]
28: ebfffffe bl 0 <matvec_intarr_floatarr>
28: R_ARM_CALL aux_arr_matvec_int_float
2c: e28dd00c add sp, sp, #12
30: e49de004 pop {lr} @ (ldr lr, [sp], #4)
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
...
38: R_ARM_ABS32 ref_arg3
3c: R_ARM_ABS32 ref_arg2
40: R_ARM_ABS32 ref_out
44: R_ARM_ABS32 ref_arg1
48: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matvec_intarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3001000 movw r1, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e3401000 movt r1, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg2
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg2
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e591c000 ldr ip, [r1]
24: e3000000 movw r0, #0
24: R_ARM_MOVW_ABS_NC ref_arg0
28: e3400000 movt r0, #0
28: R_ARM_MOVT_ABS ref_arg0
2c: e5933000 ldr r3, [r3]
30: e3001000 movw r1, #0
30: R_ARM_MOVW_ABS_NC ref_arg1
34: e3401000 movt r1, #0
34: R_ARM_MOVT_ABS ref_arg1
38: e58dc000 str ip, [sp]
3c: ebfffffe bl 0 <matvec_intarr_floatarr>
3c: R_ARM_CALL aux_arr_matvec_int_float
40: e28dd00c add sp, sp, #12
44: e49de004 pop {lr} @ (ldr lr, [sp], #4)
48: eafffffe b 0 <result_float_ref>
48: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <matvec_intarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_intarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_intarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: 681b ldr r3, [r3, #0]
a: 4a08 ldr r2, [pc, #32] @ (2c <matvec_intarr_floatarr+0x2c>)
c: 4908 ldr r1, [pc, #32] @ (30 <matvec_intarr_floatarr+0x30>)
e: 4809 ldr r0, [pc, #36] @ (34 <matvec_intarr_floatarr+0x34>)
10: b082 sub sp, #8
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_intarr_floatarr>
14: R_ARM_THM_CALL aux_arr_matvec_int_float
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matvec_intarr_floatarr>:
0: 4808 ldr r0, [pc, #32] @ (24 <matvec_intarr_floatarr+0x24>)
2: 4b09 ldr r3, [pc, #36] @ (28 <matvec_intarr_floatarr+0x28>)
4: 4a09 ldr r2, [pc, #36] @ (2c <matvec_intarr_floatarr+0x2c>)
6: 681b ldr r3, [r3, #0]
8: 4909 ldr r1, [pc, #36] @ (30 <matvec_intarr_floatarr+0x30>)
a: b510 push {r4, lr}
c: 6804 ldr r4, [r0, #0]
e: b082 sub sp, #8
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_intarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_intarr_floatarr>
14: R_ARM_THM_CALL aux_arr_matvec_int_float
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matvec_intarr_floatarr>:
0: b510 push {r4, lr}
2: f240 0100 movw r1, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0100 movt r1, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0300 movw r3, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0300 movt r3, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: 680c ldr r4, [r1, #0]
1e: f240 0000 movw r0, #0
1e: R_ARM_THM_MOVW_ABS_NC ref_arg0
22: f2c0 0000 movt r0, #0
22: R_ARM_THM_MOVT_ABS ref_arg0
26: 681b ldr r3, [r3, #0]
28: f240 0100 movw r1, #0
28: R_ARM_THM_MOVW_ABS_NC ref_arg1
2c: f2c0 0100 movt r1, #0
2c: R_ARM_THM_MOVT_ABS ref_arg1
30: 9400 str r4, [sp, #0]
32: f7ff fffe bl 0 <matvec_intarr_floatarr>
32: R_ARM_THM_CALL aux_arr_matvec_int_float
36: b002 add sp, #8
38: e8bd 4010 ldmia.w sp!, {r4, lr}
3c: f7ff bffe b.w 0 <result_float_ref>
3c: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <matvec_intarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_intarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_intarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: b082 sub sp, #8
a: 681b ldr r3, [r3, #0]
c: 4a07 ldr r2, [pc, #28] @ (2c <matvec_intarr_floatarr+0x2c>)
e: 4908 ldr r1, [pc, #32] @ (30 <matvec_intarr_floatarr+0x30>)
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_intarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_intarr_floatarr>
14: R_ARM_THM_CALL aux_arr_matvec_int_float
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matvec_intarr_floatarr>:
0: 00000717 auipc a4,0x0
0: R_RISCV_PCREL_HI20 ref_arg3
4: 00072703 lw a4,0(a4) # 0 <matvec_intarr_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000697 auipc a3,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0006a683 lw a3,0(a3) # 8 <matvec_intarr_floatarr+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_int_float
30: 000080e7 jalr ra # 2c <matvec_intarr_floatarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <matvec_intarr_floatarr+0x38>
riscv64#
0000000000000000 <matvec_intarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00072703 lw a4,0(a4) # 2 <matvec_intarr_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 0006a683 lw a3,0(a3) # a <matvec_intarr_floatarr+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_int_float
30: 000080e7 jalr ra # 2c <matvec_intarr_floatarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <matvec_intarr_floatarr+0x38>
tricore#
00000000 <matvec_intarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <matvec_intarr_floatarr>>
4: R_TRICORE_LO2 ref_arg3
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg2
c: 19 24 00 00 ld.w %d4,[%a2]0 <0 <matvec_intarr_floatarr>>
c: R_TRICORE_LO2 ref_arg2
10: 91 00 00 60 movh.a %a6,0
10: R_TRICORE_HIADJ ref_out
14: 91 00 00 50 movh.a %a5,0
14: R_TRICORE_HIADJ ref_arg1
18: 91 00 00 40 movh.a %a4,0
18: R_TRICORE_HIADJ ref_arg0
1c: d9 66 00 00 lea %a6,[%a6]0 <0 <matvec_intarr_floatarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 55 00 00 lea %a5,[%a5]0 <0 <matvec_intarr_floatarr>>
20: R_TRICORE_LO2 ref_arg1
24: d9 44 00 00 lea %a4,[%a4]0 <0 <matvec_intarr_floatarr>>
24: R_TRICORE_LO2 ref_arg0
28: 6d 00 00 00 call 28 <matvec_intarr_floatarr+0x28>
28: R_TRICORE_24REL aux_arr_matvec_int_float
2c: 1d 00 00 00 j 2c <matvec_intarr_floatarr+0x2c>
2c: R_TRICORE_24REL result_float_ref
x86#
00000000 <matvec_intarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg3
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg2
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_out
14: 68 00 00 00 00 push $0x0
15: R_386_32 ref_arg1
19: 68 00 00 00 00 push $0x0
1a: R_386_32 ref_arg0
1e: e8 fc ff ff ff call 1f <matvec_intarr_floatarr+0x1f>
1f: R_386_PC32 aux_arr_matvec_int_float
23: 83 c4 20 add $0x20,%esp
26: e9 fc ff ff ff jmp 27 <matvec_intarr_floatarr+0x27>
27: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <matvec_intarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <matvec_intarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <matvec_intarr_floatarr+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: 44 8b 00 mov (%rax),%r8d
15: 8b 09 mov (%rcx),%ecx
17: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 1e <matvec_intarr_floatarr+0x1e>
1a: R_X86_64_PC32 ref_out-0x4
1e: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 25 <matvec_intarr_floatarr+0x25>
21: R_X86_64_PC32 ref_arg1-0x4
25: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 2c <matvec_intarr_floatarr+0x2c>
28: R_X86_64_PC32 ref_arg0-0x4
2c: e8 00 00 00 00 call 31 <matvec_intarr_floatarr+0x31>
2d: R_X86_64_PLT32 aux_arr_matvec_int_float-0x4
31: 48 83 c4 08 add $0x8,%rsp
35: e9 00 00 00 00 jmp 3a <.LC0+0x2>
36: R_X86_64_PLT32 result_float_ref-0x4
matmul_intarr_floatarr#
STENCIL void matmul_intarr_floatarr(void) {
// Matrix product of a row-major m x k and a k x n matrix,
// the dimensions are passed as int array [m, k, n]
aux_arr_matmul_int_float(REF(ref_arg0), REF(ref_arg1), REF(ref_out), REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <matmul_intarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000002 adrp x2, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000063 add x3, x3, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
14: 91000042 add x2, x2, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000001 adrp x1, 0 <ref_arg1>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
1c: 90000000 adrp x0, 0 <ref_arg0>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
20: 91000021 add x1, x1, #0x0
20: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
24: 91000000 add x0, x0, #0x0
24: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
28: 94000000 bl 0 <matmul_intarr_floatarr>
28: R_AARCH64_CALL26 aux_arr_matmul_int_float
2c: a8c17bfd ldp x29, x30, [sp], #16
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <matmul_intarr_floatarr>:
0: e92d4010 push {r4, lr}
4: e59f3014 ldr r3, [pc, #20] @ 20 <matmul_intarr_floatarr+0x20>
8: e59f2014 ldr r2, [pc, #20] @ 24 <matmul_intarr_floatarr+0x24>
c: e59f1014 ldr r1, [pc, #20] @ 28 <matmul_intarr_floatarr+0x28>
10: e59f0014 ldr r0, [pc, #20] @ 2c <matmul_intarr_floatarr+0x2c>
14: ebfffffe bl 0 <matmul_intarr_floatarr>
14: R_ARM_CALL aux_arr_matmul_int_float
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_ref>
1c: R_ARM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg1
2c: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matmul_intarr_floatarr>:
0: e92d4010 push {r4, lr}
4: e3003000 movw r3, #0
4: R_ARM_MOVW_ABS_NC ref_arg2
8: e3403000 movt r3, #0
8: R_ARM_MOVT_ABS ref_arg2
c: e3002000 movw r2, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3402000 movt r2, #0
10: R_ARM_MOVT_ABS ref_out
14: e3001000 movw r1, #0
14: R_ARM_MOVW_ABS_NC ref_arg1
18: e3401000 movt r1, #0
18: R_ARM_MOVT_ABS ref_arg1
1c: e3000000 movw r0, #0
1c: R_ARM_MOVW_ABS_NC ref_arg0
20: e3400000 movt r0, #0
20: R_ARM_MOVT_ABS ref_arg0
24: ebfffffe bl 0 <matmul_intarr_floatarr>
24: R_ARM_CALL aux_arr_matmul_int_float
28: e8bd4010 pop {r4, lr}
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <matmul_intarr_floatarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_intarr_floatarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_intarr_floatarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_intarr_floatarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_intarr_floatarr+0x24>)
a: f7ff fffe bl 0 <matmul_intarr_floatarr>
a: R_ARM_THM_CALL aux_arr_matmul_int_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matmul_intarr_floatarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_intarr_floatarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_intarr_floatarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_intarr_floatarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_intarr_floatarr+0x24>)
a: f7ff fffe bl 0 <matmul_intarr_floatarr>
a: R_ARM_THM_CALL aux_arr_matmul_int_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matmul_intarr_floatarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_out
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_out
a: f240 0300 movw r3, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg2
e: f2c0 0300 movt r3, #0
e: R_ARM_THM_MOVT_ABS ref_arg2
12: f240 0100 movw r1, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg1
16: f2c0 0100 movt r1, #0
16: R_ARM_THM_MOVT_ABS ref_arg1
1a: f240 0000 movw r0, #0
1a: R_ARM_THM_MOVW_ABS_NC ref_arg0
1e: f2c0 0000 movt r0, #0
1e: R_ARM_THM_MOVT_ABS ref_arg0
22: f7ff fffe bl 0 <matmul_intarr_floatarr>
22: R_ARM_THM_CALL aux_arr_matmul_int_float
26: e8bd 4008 ldmia.w sp!, {r3, lr}
2a: f7ff bffe b.w 0 <result_float_ref>
2a: R_ARM_THM_JUMP24 result_float_ref
2e: bf00 nop
armv81mthumb#
00000000 <matmul_intarr_floatarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_intarr_floatarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_intarr_floatarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_intarr_floatarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_intarr_floatarr+0x24>)
a: f7ff fffe bl 0 <matmul_intarr_floatarr>
a: R_ARM_THM_CALL aux_arr_matmul_int_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matmul_intarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: c606 sw ra,12(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_int_float
28: 000080e7 jalr ra # 24 <matmul_intarr_floatarr+0x24>
2c: 40b2 lw ra,12(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <matmul_intarr_floatarr+0x30>
riscv64#
0000000000000000 <matmul_intarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: e406 sd ra,8(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_int_float
28: 000080e7 jalr ra # 24 <matmul_intarr_floatarr+0x24>
2c: 60a2 ld ra,8(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <matmul_intarr_floatarr+0x30>
tricore#
00000000 <matmul_intarr_floatarr>:
0: 91 00 00 70 movh.a %a7,0
0: R_TRICORE_HIADJ ref_arg2
4: 91 00 00 60 movh.a %a6,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 77 00 00 lea %a7,[%a7]0 <0 <matmul_intarr_floatarr>>
10: R_TRICORE_LO2 ref_arg2
14: d9 66 00 00 lea %a6,[%a6]0 <0 <matmul_intarr_floatarr>>
14: R_TRICORE_LO2 ref_out
18: d9 55 00 00 lea %a5,[%a5]0 <0 <matmul_intarr_floatarr>>
18: R_TRICORE_LO2 ref_arg1
1c: d9 44 00 00 lea %a4,[%a4]0 <0 <matmul_intarr_floatarr>>
1c: R_TRICORE_LO2 ref_arg0
20: 6d 00 00 00 call 20 <matmul_intarr_floatarr+0x20>
20: R_TRICORE_24REL aux_arr_matmul_int_float
24: 1d 00 00 00 j 24 <matmul_intarr_floatarr+0x24>
24: R_TRICORE_24REL result_float_ref
x86#
00000000 <matmul_intarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg2
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg1
12: 68 00 00 00 00 push $0x0
13: R_386_32 ref_arg0
17: e8 fc ff ff ff call 18 <matmul_intarr_floatarr+0x18>
18: R_386_PC32 aux_arr_matmul_int_float
1c: 83 c4 1c add $0x1c,%esp
1f: e9 fc ff ff ff jmp 20 <matmul_intarr_floatarr+0x20>
20: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <matmul_intarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # b <matmul_intarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 12 <matmul_intarr_floatarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 19 <matmul_intarr_floatarr+0x19>
15: R_X86_64_PC32 ref_arg1-0x4
19: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 20 <matmul_intarr_floatarr+0x20>
1c: R_X86_64_PC32 ref_arg0-0x4
20: e8 00 00 00 00 call 25 <matmul_intarr_floatarr+0x25>
21: R_X86_64_PLT32 aux_arr_matmul_int_float-0x4
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
dot_floatarr_intarr#
STENCIL void dot_floatarr_intarr(void) {
// Dot product of float array and int array
*(float *)REF(ref_out) = aux_arr_dot_float_int(REF(ref_arg0), REF(ref_arg1), *(int *)REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <dot_floatarr_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000001 adrp x1, 0 <ref_arg1>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <dot_floatarr_intarr>
20: R_AARCH64_CALL26 aux_arr_dot_float_int
24: 90000000 adrp x0, 0 <ref_out>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_out
28: a8c17bfd ldp x29, x30, [sp], #16
2c: bd000000 str s0, [x0]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <dot_floatarr_intarr>:
0: e59f3020 ldr r3, [pc, #32] @ 28 <dot_floatarr_intarr+0x28>
4: e92d4010 push {r4, lr}
8: e5932000 ldr r2, [r3]
c: e59f1018 ldr r1, [pc, #24] @ 2c <dot_floatarr_intarr+0x2c>
10: e59f0018 ldr r0, [pc, #24] @ 30 <dot_floatarr_intarr+0x30>
14: ebfffffe bl 0 <dot_floatarr_intarr>
14: R_ARM_CALL aux_arr_dot_float_int
18: e59f3014 ldr r3, [pc, #20] @ 34 <dot_floatarr_intarr+0x34>
1c: e8bd4010 pop {r4, lr}
20: ed830a00 vstr s0, [r3]
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
...
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
34: R_ARM_ABS32 ref_out
armv7#
00000000 <dot_floatarr_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg2
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg2
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_arg1
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_arg1
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <dot_floatarr_intarr>
20: R_ARM_CALL aux_arr_dot_float_int
24: e3003000 movw r3, #0
24: R_ARM_MOVW_ABS_NC ref_out
28: e3403000 movt r3, #0
28: R_ARM_MOVT_ABS ref_out
2c: e8bd4010 pop {r4, lr}
30: ed830a00 vstr s0, [r3]
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <dot_floatarr_intarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_floatarr_intarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_floatarr_intarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_floatarr_intarr+0x24>)
a: f7ff fffe bl 0 <dot_floatarr_intarr>
a: R_ARM_THM_CALL aux_arr_dot_float_int
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_floatarr_intarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <dot_floatarr_intarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_floatarr_intarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_floatarr_intarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_floatarr_intarr+0x24>)
a: f7ff fffe bl 0 <dot_floatarr_intarr>
a: R_ARM_THM_CALL aux_arr_dot_float_int
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_floatarr_intarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <dot_floatarr_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg2
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg2
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg1
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_arg1
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <dot_floatarr_intarr>
1c: R_ARM_THM_CALL aux_arr_dot_float_int
20: f240 0300 movw r3, #0
20: R_ARM_THM_MOVW_ABS_NC ref_out
24: f2c0 0300 movt r3, #0
24: R_ARM_THM_MOVT_ABS ref_out
28: ed83 0a00 vstr s0, [r3]
2c: e8bd 4008 ldmia.w sp!, {r3, lr}
30: f7ff bffe b.w 0 <result_float_ref>
30: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <dot_floatarr_intarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_floatarr_intarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_floatarr_intarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_floatarr_intarr+0x24>)
a: f7ff fffe bl 0 <dot_floatarr_intarr>
a: R_ARM_THM_CALL aux_arr_dot_float_int
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_floatarr_intarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
riscv32#
00000000 <dot_floatarr_intarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg2
4: 00062603 lw a2,0(a2) # 0 <dot_floatarr_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_float_int
20: 000080e7 jalr ra # 1c <dot_floatarr_intarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00078793 mv a5,a5
2a: R_RISCV_PCREL_LO12_I .L0
2e: e388 fsw fa0,0(a5)
30: 0141 addi sp,sp,16
32: 00000317 auipc t1,0x0
32: R_RISCV_CALL_PLT result_float_ref
36: 00030067 jr t1 # 32 <dot_floatarr_intarr+0x32>
riscv64#
0000000000000000 <dot_floatarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00062603 lw a2,0(a2) # 2 <dot_floatarr_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_float_int
20: 000080e7 jalr ra # 1c <dot_floatarr_intarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a027 fsw fa0,0(a5) # 26 <dot_floatarr_intarr+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <dot_floatarr_intarr+0x30>
tricore#
00000000 <dot_floatarr_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <dot_floatarr_intarr>>
4: R_TRICORE_LO2 ref_arg2
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <dot_floatarr_intarr>>
10: R_TRICORE_LO2 ref_arg1
14: d9 44 00 00 lea %a4,[%a4]0 <0 <dot_floatarr_intarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <dot_floatarr_intarr+0x18>
18: R_TRICORE_24REL aux_arr_dot_float_int
1c: 91 00 00 20 movh.a %a2,0
1c: R_TRICORE_HIADJ ref_out
20: d9 22 00 00 lea %a2,[%a2]0 <0 <dot_floatarr_intarr>>
20: R_TRICORE_LO2 ref_out
24: 74 22 st.w [%a2],%d2
26: 1d 00 00 00 j 26 <dot_floatarr_intarr+0x26>
26: R_TRICORE_24REL result_float_ref
x86#
00000000 <dot_floatarr_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg2
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg1
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <dot_floatarr_intarr+0x14>
14: R_386_PC32 aux_arr_dot_float_int
18: d9 1d 00 00 00 00 fstps 0x0
1a: R_386_32 ref_out
1e: 83 c4 18 add $0x18,%esp
21: e9 fc ff ff ff jmp 22 <dot_floatarr_intarr+0x22>
22: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <dot_floatarr_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <dot_floatarr_intarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 8b 10 mov (%rax),%edx
d: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 14 <dot_floatarr_intarr+0x14>
10: R_X86_64_PC32 ref_arg1-0x4
14: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1b <dot_floatarr_intarr+0x1b>
17: R_X86_64_PC32 ref_arg0-0x4
1b: e8 00 00 00 00 call 20 <dot_floatarr_intarr+0x20>
1c: R_X86_64_PLT32 aux_arr_dot_float_int-0x4
20: 4c 8d 1d 00 00 00 00 lea 0x0(%rip),%r11 # 27 <dot_floatarr_intarr+0x27>
23: R_X86_64_PC32 ref_out-0x4
27: f3 41 0f 11 03 movss %xmm0,(%r11)
2c: 48 83 c4 08 add $0x8,%rsp
30: e9 00 00 00 00 jmp 35 <.LC1+0x1>
31: R_X86_64_PLT32 result_float_ref-0x4
matvec_floatarr_intarr#
STENCIL void matvec_floatarr_intarr(void) {
// Product of a row-major m x n matrix and a vector of n elements
aux_arr_matvec_float_int(REF(ref_arg0), REF(ref_arg1), REF(ref_out), *(int *)REF(ref_arg2), *(int *)REF(ref_arg3));
result_float_ref();
}
arm64#
0000000000000000 <matvec_floatarr_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000000 adrp x0, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400064 ldr w4, [x3]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg3
14: 90000002 adrp x2, 0 <ref_out>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_out
18: b9400003 ldr w3, [x0]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
1c: 91000042 add x2, x2, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_out
20: 90000001 adrp x1, 0 <ref_arg1>
20: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
24: 90000000 adrp x0, 0 <ref_arg0>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
28: 91000021 add x1, x1, #0x0
28: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <matvec_floatarr_intarr>
30: R_AARCH64_CALL26 aux_arr_matvec_float_int
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <matvec_floatarr_intarr>:
0: e59f1030 ldr r1, [pc, #48] @ 38 <matvec_floatarr_intarr+0x38>
4: e59f3030 ldr r3, [pc, #48] @ 3c <matvec_floatarr_intarr+0x3c>
8: e52de004 push {lr} @ (str lr, [sp, #-4]!)
c: e24dd00c sub sp, sp, #12
10: e591c000 ldr ip, [r1]
14: e5933000 ldr r3, [r3]
18: e59f2020 ldr r2, [pc, #32] @ 40 <matvec_floatarr_intarr+0x40>
1c: e59f1020 ldr r1, [pc, #32] @ 44 <matvec_floatarr_intarr+0x44>
20: e59f0020 ldr r0, [pc, #32] @ 48 <matvec_floatarr_intarr+0x48>
24: e58dc000 str ip, [sp]
28: ebfffffe bl 0 <matvec_floatarr_intarr>
28: R_ARM_CALL aux_arr_matvec_float_int
2c: e28dd00c add sp, sp, #12
30: e49de004 pop {lr} @ (ldr lr, [sp], #4)
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
...
38: R_ARM_ABS32 ref_arg3
3c: R_ARM_ABS32 ref_arg2
40: R_ARM_ABS32 ref_out
44: R_ARM_ABS32 ref_arg1
48: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matvec_floatarr_intarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3001000 movw r1, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e3401000 movt r1, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg2
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg2
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e591c000 ldr ip, [r1]
24: e3000000 movw r0, #0
24: R_ARM_MOVW_ABS_NC ref_arg0
28: e3400000 movt r0, #0
28: R_ARM_MOVT_ABS ref_arg0
2c: e5933000 ldr r3, [r3]
30: e3001000 movw r1, #0
30: R_ARM_MOVW_ABS_NC ref_arg1
34: e3401000 movt r1, #0
34: R_ARM_MOVT_ABS ref_arg1
38: e58dc000 str ip, [sp]
3c: ebfffffe bl 0 <matvec_floatarr_intarr>
3c: R_ARM_CALL aux_arr_matvec_float_int
40: e28dd00c add sp, sp, #12
44: e49de004 pop {lr} @ (ldr lr, [sp], #4)
48: eafffffe b 0 <result_float_ref>
48: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <matvec_floatarr_intarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_floatarr_intarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_floatarr_intarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: 681b ldr r3, [r3, #0]
a: 4a08 ldr r2, [pc, #32] @ (2c <matvec_floatarr_intarr+0x2c>)
c: 4908 ldr r1, [pc, #32] @ (30 <matvec_floatarr_intarr+0x30>)
e: 4809 ldr r0, [pc, #36] @ (34 <matvec_floatarr_intarr+0x34>)
10: b082 sub sp, #8
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_floatarr_intarr>
14: R_ARM_THM_CALL aux_arr_matvec_float_int
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matvec_floatarr_intarr>:
0: 4808 ldr r0, [pc, #32] @ (24 <matvec_floatarr_intarr+0x24>)
2: 4b09 ldr r3, [pc, #36] @ (28 <matvec_floatarr_intarr+0x28>)
4: 4a09 ldr r2, [pc, #36] @ (2c <matvec_floatarr_intarr+0x2c>)
6: 681b ldr r3, [r3, #0]
8: 4909 ldr r1, [pc, #36] @ (30 <matvec_floatarr_intarr+0x30>)
a: b510 push {r4, lr}
c: 6804 ldr r4, [r0, #0]
e: b082 sub sp, #8
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_floatarr_intarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_floatarr_intarr>
14: R_ARM_THM_CALL aux_arr_matvec_float_int
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matvec_floatarr_intarr>:
0: b510 push {r4, lr}
2: f240 0100 movw r1, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0100 movt r1, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0300 movw r3, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0300 movt r3, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: 680c ldr r4, [r1, #0]
1e: f240 0000 movw r0, #0
1e: R_ARM_THM_MOVW_ABS_NC ref_arg0
22: f2c0 0000 movt r0, #0
22: R_ARM_THM_MOVT_ABS ref_arg0
26: 681b ldr r3, [r3, #0]
28: f240 0100 movw r1, #0
28: R_ARM_THM_MOVW_ABS_NC ref_arg1
2c: f2c0 0100 movt r1, #0
2c: R_ARM_THM_MOVT_ABS ref_arg1
30: 9400 str r4, [sp, #0]
32: f7ff fffe bl 0 <matvec_floatarr_intarr>
32: R_ARM_THM_CALL aux_arr_matvec_float_int
36: b002 add sp, #8
38: e8bd 4010 ldmia.w sp!, {r4, lr}
3c: f7ff bffe b.w 0 <result_float_ref>
3c: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <matvec_floatarr_intarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_floatarr_intarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_floatarr_intarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: b082 sub sp, #8
a: 681b ldr r3, [r3, #0]
c: 4a07 ldr r2, [pc, #28] @ (2c <matvec_floatarr_intarr+0x2c>)
e: 4908 ldr r1, [pc, #32] @ (30 <matvec_floatarr_intarr+0x30>)
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_floatarr_intarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_floatarr_intarr>
14: R_ARM_THM_CALL aux_arr_matvec_float_int
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matvec_floatarr_intarr>:
0: 00000717 auipc a4,0x0
0: R_RISCV_PCREL_HI20 ref_arg3
4: 00072703 lw a4,0(a4) # 0 <matvec_floatarr_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000697 auipc a3,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0006a683 lw a3,0(a3) # 8 <matvec_floatarr_intarr+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_float_int
30: 000080e7 jalr ra # 2c <matvec_floatarr_intarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <matvec_floatarr_intarr+0x38>
riscv64#
0000000000000000 <matvec_floatarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00072703 lw a4,0(a4) # 2 <matvec_floatarr_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 0006a683 lw a3,0(a3) # a <matvec_floatarr_intarr+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_float_int
30: 000080e7 jalr ra # 2c <matvec_floatarr_intarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <matvec_floatarr_intarr+0x38>
tricore#
00000000 <matvec_floatarr_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <matvec_floatarr_intarr>>
4: R_TRICORE_LO2 ref_arg3
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg2
c: 19 24 00 00 ld.w %d4,[%a2]0 <0 <matvec_floatarr_intarr>>
c: R_TRICORE_LO2 ref_arg2
10: 91 00 00 60 movh.a %a6,0
10: R_TRICORE_HIADJ ref_out
14: 91 00 00 50 movh.a %a5,0
14: R_TRICORE_HIADJ ref_arg1
18: 91 00 00 40 movh.a %a4,0
18: R_TRICORE_HIADJ ref_arg0
1c: d9 66 00 00 lea %a6,[%a6]0 <0 <matvec_floatarr_intarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 55 00 00 lea %a5,[%a5]0 <0 <matvec_floatarr_intarr>>
20: R_TRICORE_LO2 ref_arg1
24: d9 44 00 00 lea %a4,[%a4]0 <0 <matvec_floatarr_intarr>>
24: R_TRICORE_LO2 ref_arg0
28: 6d 00 00 00 call 28 <matvec_floatarr_intarr+0x28>
28: R_TRICORE_24REL aux_arr_matvec_float_int
2c: 1d 00 00 00 j 2c <matvec_floatarr_intarr+0x2c>
2c: R_TRICORE_24REL result_float_ref
x86#
00000000 <matvec_floatarr_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg3
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg2
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_out
14: 68 00 00 00 00 push $0x0
15: R_386_32 ref_arg1
19: 68 00 00 00 00 push $0x0
1a: R_386_32 ref_arg0
1e: e8 fc ff ff ff call 1f <matvec_floatarr_intarr+0x1f>
1f: R_386_PC32 aux_arr_matvec_float_int
23: 83 c4 20 add $0x20,%esp
26: e9 fc ff ff ff jmp 27 <matvec_floatarr_intarr+0x27>
27: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <matvec_floatarr_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <matvec_floatarr_intarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <matvec_floatarr_intarr+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: 44 8b 00 mov (%rax),%r8d
15: 8b 09 mov (%rcx),%ecx
17: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 1e <matvec_floatarr_intarr+0x1e>
1a: R_X86_64_PC32 ref_out-0x4
1e: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 25 <matvec_floatarr_intarr+0x25>
21: R_X86_64_PC32 ref_arg1-0x4
25: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 2c <matvec_floatarr_intarr+0x2c>
28: R_X86_64_PC32 ref_arg0-0x4
2c: e8 00 00 00 00 call 31 <matvec_floatarr_intarr+0x31>
2d: R_X86_64_PLT32 aux_arr_matvec_float_int-0x4
31: 48 83 c4 08 add $0x8,%rsp
35: e9 00 00 00 00 jmp 3a <.LC0+0x2>
36: R_X86_64_PLT32 result_float_ref-0x4
matmul_floatarr_intarr#
STENCIL void matmul_floatarr_intarr(void) {
// Matrix product of a row-major m x k and a k x n matrix,
// the dimensions are passed as int array [m, k, n]
aux_arr_matmul_float_int(REF(ref_arg0), REF(ref_arg1), REF(ref_out), REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <matmul_floatarr_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000002 adrp x2, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000063 add x3, x3, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
14: 91000042 add x2, x2, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000001 adrp x1, 0 <ref_arg1>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
1c: 90000000 adrp x0, 0 <ref_arg0>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
20: 91000021 add x1, x1, #0x0
20: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
24: 91000000 add x0, x0, #0x0
24: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
28: 94000000 bl 0 <matmul_floatarr_intarr>
28: R_AARCH64_CALL26 aux_arr_matmul_float_int
2c: a8c17bfd ldp x29, x30, [sp], #16
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <matmul_floatarr_intarr>:
0: e92d4010 push {r4, lr}
4: e59f3014 ldr r3, [pc, #20] @ 20 <matmul_floatarr_intarr+0x20>
8: e59f2014 ldr r2, [pc, #20] @ 24 <matmul_floatarr_intarr+0x24>
c: e59f1014 ldr r1, [pc, #20] @ 28 <matmul_floatarr_intarr+0x28>
10: e59f0014 ldr r0, [pc, #20] @ 2c <matmul_floatarr_intarr+0x2c>
14: ebfffffe bl 0 <matmul_floatarr_intarr>
14: R_ARM_CALL aux_arr_matmul_float_int
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_ref>
1c: R_ARM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg1
2c: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matmul_floatarr_intarr>:
0: e92d4010 push {r4, lr}
4: e3003000 movw r3, #0
4: R_ARM_MOVW_ABS_NC ref_arg2
8: e3403000 movt r3, #0
8: R_ARM_MOVT_ABS ref_arg2
c: e3002000 movw r2, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3402000 movt r2, #0
10: R_ARM_MOVT_ABS ref_out
14: e3001000 movw r1, #0
14: R_ARM_MOVW_ABS_NC ref_arg1
18: e3401000 movt r1, #0
18: R_ARM_MOVT_ABS ref_arg1
1c: e3000000 movw r0, #0
1c: R_ARM_MOVW_ABS_NC ref_arg0
20: e3400000 movt r0, #0
20: R_ARM_MOVT_ABS ref_arg0
24: ebfffffe bl 0 <matmul_floatarr_intarr>
24: R_ARM_CALL aux_arr_matmul_float_int
28: e8bd4010 pop {r4, lr}
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <matmul_floatarr_intarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_floatarr_intarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_floatarr_intarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_floatarr_intarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_floatarr_intarr+0x24>)
a: f7ff fffe bl 0 <matmul_floatarr_intarr>
a: R_ARM_THM_CALL aux_arr_matmul_float_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matmul_floatarr_intarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_floatarr_intarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_floatarr_intarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_floatarr_intarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_floatarr_intarr+0x24>)
a: f7ff fffe bl 0 <matmul_floatarr_intarr>
a: R_ARM_THM_CALL aux_arr_matmul_float_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matmul_floatarr_intarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_out
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_out
a: f240 0300 movw r3, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg2
e: f2c0 0300 movt r3, #0
e: R_ARM_THM_MOVT_ABS ref_arg2
12: f240 0100 movw r1, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg1
16: f2c0 0100 movt r1, #0
16: R_ARM_THM_MOVT_ABS ref_arg1
1a: f240 0000 movw r0, #0
1a: R_ARM_THM_MOVW_ABS_NC ref_arg0
1e: f2c0 0000 movt r0, #0
1e: R_ARM_THM_MOVT_ABS ref_arg0
22: f7ff fffe bl 0 <matmul_floatarr_intarr>
22: R_ARM_THM_CALL aux_arr_matmul_float_int
26: e8bd 4008 ldmia.w sp!, {r3, lr}
2a: f7ff bffe b.w 0 <result_float_ref>
2a: R_ARM_THM_JUMP24 result_float_ref
2e: bf00 nop
armv81mthumb#
00000000 <matmul_floatarr_intarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_floatarr_intarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_floatarr_intarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_floatarr_intarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_floatarr_intarr+0x24>)
a: f7ff fffe bl 0 <matmul_floatarr_intarr>
a: R_ARM_THM_CALL aux_arr_matmul_float_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matmul_floatarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: c606 sw ra,12(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_float_int
28: 000080e7 jalr ra # 24 <matmul_floatarr_intarr+0x24>
2c: 40b2 lw ra,12(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <matmul_floatarr_intarr+0x30>
riscv64#
0000000000000000 <matmul_floatarr_intarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: e406 sd ra,8(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_float_int
28: 000080e7 jalr ra # 24 <matmul_floatarr_intarr+0x24>
2c: 60a2 ld ra,8(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <matmul_floatarr_intarr+0x30>
tricore#
00000000 <matmul_floatarr_intarr>:
0: 91 00 00 70 movh.a %a7,0
0: R_TRICORE_HIADJ ref_arg2
4: 91 00 00 60 movh.a %a6,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 77 00 00 lea %a7,[%a7]0 <0 <matmul_floatarr_intarr>>
10: R_TRICORE_LO2 ref_arg2
14: d9 66 00 00 lea %a6,[%a6]0 <0 <matmul_floatarr_intarr>>
14: R_TRICORE_LO2 ref_out
18: d9 55 00 00 lea %a5,[%a5]0 <0 <matmul_floatarr_intarr>>
18: R_TRICORE_LO2 ref_arg1
1c: d9 44 00 00 lea %a4,[%a4]0 <0 <matmul_floatarr_intarr>>
1c: R_TRICORE_LO2 ref_arg0
20: 6d 00 00 00 call 20 <matmul_floatarr_intarr+0x20>
20: R_TRICORE_24REL aux_arr_matmul_float_int
24: 1d 00 00 00 j 24 <matmul_floatarr_intarr+0x24>
24: R_TRICORE_24REL result_float_ref
x86#
00000000 <matmul_floatarr_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg2
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg1
12: 68 00 00 00 00 push $0x0
13: R_386_32 ref_arg0
17: e8 fc ff ff ff call 18 <matmul_floatarr_intarr+0x18>
18: R_386_PC32 aux_arr_matmul_float_int
1c: 83 c4 1c add $0x1c,%esp
1f: e9 fc ff ff ff jmp 20 <matmul_floatarr_intarr+0x20>
20: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <matmul_floatarr_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # b <matmul_floatarr_intarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 12 <matmul_floatarr_intarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 19 <matmul_floatarr_intarr+0x19>
15: R_X86_64_PC32 ref_arg1-0x4
19: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 20 <matmul_floatarr_intarr+0x20>
1c: R_X86_64_PC32 ref_arg0-0x4
20: e8 00 00 00 00 call 25 <matmul_floatarr_intarr+0x25>
21: R_X86_64_PLT32 aux_arr_matmul_float_int-0x4
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
dot_floatarr_floatarr#
STENCIL void dot_floatarr_floatarr(void) {
// Dot product of float array and float array
*(float *)REF(ref_out) = aux_arr_dot_float_float(REF(ref_arg0), REF(ref_arg1), *(int *)REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <dot_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000001 adrp x1, 0 <ref_arg1>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <dot_floatarr_floatarr>
20: R_AARCH64_CALL26 aux_arr_dot_float_float
24: 90000000 adrp x0, 0 <ref_out>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_out
28: a8c17bfd ldp x29, x30, [sp], #16
2c: bd000000 str s0, [x0]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <dot_floatarr_floatarr>:
0: e59f3020 ldr r3, [pc, #32] @ 28 <dot_floatarr_floatarr+0x28>
4: e92d4010 push {r4, lr}
8: e5932000 ldr r2, [r3]
c: e59f1018 ldr r1, [pc, #24] @ 2c <dot_floatarr_floatarr+0x2c>
10: e59f0018 ldr r0, [pc, #24] @ 30 <dot_floatarr_floatarr+0x30>
14: ebfffffe bl 0 <dot_floatarr_floatarr>
14: R_ARM_CALL aux_arr_dot_float_float
18: e59f3014 ldr r3, [pc, #20] @ 34 <dot_floatarr_floatarr+0x34>
1c: e8bd4010 pop {r4, lr}
20: ed830a00 vstr s0, [r3]
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
...
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
34: R_ARM_ABS32 ref_out
armv7#
00000000 <dot_floatarr_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg2
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg2
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_arg1
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_arg1
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <dot_floatarr_floatarr>
20: R_ARM_CALL aux_arr_dot_float_float
24: e3003000 movw r3, #0
24: R_ARM_MOVW_ABS_NC ref_out
28: e3403000 movt r3, #0
28: R_ARM_MOVT_ABS ref_out
2c: e8bd4010 pop {r4, lr}
30: ed830a00 vstr s0, [r3]
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <dot_floatarr_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_floatarr_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_floatarr_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_floatarr_floatarr+0x24>)
a: f7ff fffe bl 0 <dot_floatarr_floatarr>
a: R_ARM_THM_CALL aux_arr_dot_float_float
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_floatarr_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <dot_floatarr_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_floatarr_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_floatarr_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_floatarr_floatarr+0x24>)
a: f7ff fffe bl 0 <dot_floatarr_floatarr>
a: R_ARM_THM_CALL aux_arr_dot_float_float
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_floatarr_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <dot_floatarr_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg2
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg2
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg1
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_arg1
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <dot_floatarr_floatarr>
1c: R_ARM_THM_CALL aux_arr_dot_float_float
20: f240 0300 movw r3, #0
20: R_ARM_THM_MOVW_ABS_NC ref_out
24: f2c0 0300 movt r3, #0
24: R_ARM_THM_MOVT_ABS ref_out
28: ed83 0a00 vstr s0, [r3]
2c: e8bd 4008 ldmia.w sp!, {r3, lr}
30: f7ff bffe b.w 0 <result_float_ref>
30: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <dot_floatarr_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <dot_floatarr_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <dot_floatarr_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <dot_floatarr_floatarr+0x24>)
a: f7ff fffe bl 0 <dot_floatarr_floatarr>
a: R_ARM_THM_CALL aux_arr_dot_float_float
e: 4b06 ldr r3, [pc, #24] @ (28 <dot_floatarr_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
riscv32#
00000000 <dot_floatarr_floatarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg2
4: 00062603 lw a2,0(a2) # 0 <dot_floatarr_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_float_float
20: 000080e7 jalr ra # 1c <dot_floatarr_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00078793 mv a5,a5
2a: R_RISCV_PCREL_LO12_I .L0
2e: e388 fsw fa0,0(a5)
30: 0141 addi sp,sp,16
32: 00000317 auipc t1,0x0
32: R_RISCV_CALL_PLT result_float_ref
36: 00030067 jr t1 # 32 <dot_floatarr_floatarr+0x32>
riscv64#
0000000000000000 <dot_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00062603 lw a2,0(a2) # 2 <dot_floatarr_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_dot_float_float
20: 000080e7 jalr ra # 1c <dot_floatarr_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a027 fsw fa0,0(a5) # 26 <dot_floatarr_floatarr+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <dot_floatarr_floatarr+0x30>
tricore#
00000000 <dot_floatarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <dot_floatarr_floatarr>>
4: R_TRICORE_LO2 ref_arg2
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <dot_floatarr_floatarr>>
10: R_TRICORE_LO2 ref_arg1
14: d9 44 00 00 lea %a4,[%a4]0 <0 <dot_floatarr_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <dot_floatarr_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_dot_float_float
1c: 91 00 00 20 movh.a %a2,0
1c: R_TRICORE_HIADJ ref_out
20: d9 22 00 00 lea %a2,[%a2]0 <0 <dot_floatarr_floatarr>>
20: R_TRICORE_LO2 ref_out
24: 74 22 st.w [%a2],%d2
26: 1d 00 00 00 j 26 <dot_floatarr_floatarr+0x26>
26: R_TRICORE_24REL result_float_ref
x86#
00000000 <dot_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg2
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg1
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <dot_floatarr_floatarr+0x14>
14: R_386_PC32 aux_arr_dot_float_float
18: d9 1d 00 00 00 00 fstps 0x0
1a: R_386_32 ref_out
1e: 83 c4 18 add $0x18,%esp
21: e9 fc ff ff ff jmp 22 <dot_floatarr_floatarr+0x22>
22: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <dot_floatarr_floatarr>:
0: 53 push %rbx
1: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 8 <dot_floatarr_floatarr+0x8>
4: R_X86_64_PC32 ref_arg2-0x4
8: 8b 10 mov (%rax),%edx
a: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 11 <dot_floatarr_floatarr+0x11>
d: R_X86_64_PC32 ref_arg1-0x4
11: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 18 <dot_floatarr_floatarr+0x18>
14: R_X86_64_PC32 ref_arg0-0x4
18: e8 00 00 00 00 call 1d <dot_floatarr_floatarr+0x1d>
19: R_X86_64_PLT32 aux_arr_dot_float_float-0x4
1d: 48 8d 1d 00 00 00 00 lea 0x0(%rip),%rbx # 24 <dot_floatarr_floatarr+0x24>
20: R_X86_64_PC32 ref_out-0x4
24: f3 0f 11 03 movss %xmm0,(%rbx)
28: 5b pop %rbx
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
matvec_floatarr_floatarr#
STENCIL void matvec_floatarr_floatarr(void) {
// Product of a row-major m x n matrix and a vector of n elements
aux_arr_matvec_float_float(REF(ref_arg0), REF(ref_arg1), REF(ref_out), *(int *)REF(ref_arg2), *(int *)REF(ref_arg3));
result_float_ref();
}
arm64#
0000000000000000 <matvec_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000000 adrp x0, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400064 ldr w4, [x3]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg3
14: 90000002 adrp x2, 0 <ref_out>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_out
18: b9400003 ldr w3, [x0]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
1c: 91000042 add x2, x2, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_out
20: 90000001 adrp x1, 0 <ref_arg1>
20: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
24: 90000000 adrp x0, 0 <ref_arg0>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
28: 91000021 add x1, x1, #0x0
28: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <matvec_floatarr_floatarr>
30: R_AARCH64_CALL26 aux_arr_matvec_float_float
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <matvec_floatarr_floatarr>:
0: e59f1030 ldr r1, [pc, #48] @ 38 <matvec_floatarr_floatarr+0x38>
4: e59f3030 ldr r3, [pc, #48] @ 3c <matvec_floatarr_floatarr+0x3c>
8: e52de004 push {lr} @ (str lr, [sp, #-4]!)
c: e24dd00c sub sp, sp, #12
10: e591c000 ldr ip, [r1]
14: e5933000 ldr r3, [r3]
18: e59f2020 ldr r2, [pc, #32] @ 40 <matvec_floatarr_floatarr+0x40>
1c: e59f1020 ldr r1, [pc, #32] @ 44 <matvec_floatarr_floatarr+0x44>
20: e59f0020 ldr r0, [pc, #32] @ 48 <matvec_floatarr_floatarr+0x48>
24: e58dc000 str ip, [sp]
28: ebfffffe bl 0 <matvec_floatarr_floatarr>
28: R_ARM_CALL aux_arr_matvec_float_float
2c: e28dd00c add sp, sp, #12
30: e49de004 pop {lr} @ (ldr lr, [sp], #4)
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
...
38: R_ARM_ABS32 ref_arg3
3c: R_ARM_ABS32 ref_arg2
40: R_ARM_ABS32 ref_out
44: R_ARM_ABS32 ref_arg1
48: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matvec_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3001000 movw r1, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e3401000 movt r1, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg2
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg2
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e591c000 ldr ip, [r1]
24: e3000000 movw r0, #0
24: R_ARM_MOVW_ABS_NC ref_arg0
28: e3400000 movt r0, #0
28: R_ARM_MOVT_ABS ref_arg0
2c: e5933000 ldr r3, [r3]
30: e3001000 movw r1, #0
30: R_ARM_MOVW_ABS_NC ref_arg1
34: e3401000 movt r1, #0
34: R_ARM_MOVT_ABS ref_arg1
38: e58dc000 str ip, [sp]
3c: ebfffffe bl 0 <matvec_floatarr_floatarr>
3c: R_ARM_CALL aux_arr_matvec_float_float
40: e28dd00c add sp, sp, #12
44: e49de004 pop {lr} @ (ldr lr, [sp], #4)
48: eafffffe b 0 <result_float_ref>
48: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <matvec_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_floatarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_floatarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: 681b ldr r3, [r3, #0]
a: 4a08 ldr r2, [pc, #32] @ (2c <matvec_floatarr_floatarr+0x2c>)
c: 4908 ldr r1, [pc, #32] @ (30 <matvec_floatarr_floatarr+0x30>)
e: 4809 ldr r0, [pc, #36] @ (34 <matvec_floatarr_floatarr+0x34>)
10: b082 sub sp, #8
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_matvec_float_float
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matvec_floatarr_floatarr>:
0: 4808 ldr r0, [pc, #32] @ (24 <matvec_floatarr_floatarr+0x24>)
2: 4b09 ldr r3, [pc, #36] @ (28 <matvec_floatarr_floatarr+0x28>)
4: 4a09 ldr r2, [pc, #36] @ (2c <matvec_floatarr_floatarr+0x2c>)
6: 681b ldr r3, [r3, #0]
8: 4909 ldr r1, [pc, #36] @ (30 <matvec_floatarr_floatarr+0x30>)
a: b510 push {r4, lr}
c: 6804 ldr r4, [r0, #0]
e: b082 sub sp, #8
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_floatarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_matvec_float_float
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matvec_floatarr_floatarr>:
0: b510 push {r4, lr}
2: f240 0100 movw r1, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0100 movt r1, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0300 movw r3, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0300 movt r3, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: 680c ldr r4, [r1, #0]
1e: f240 0000 movw r0, #0
1e: R_ARM_THM_MOVW_ABS_NC ref_arg0
22: f2c0 0000 movt r0, #0
22: R_ARM_THM_MOVT_ABS ref_arg0
26: 681b ldr r3, [r3, #0]
28: f240 0100 movw r1, #0
28: R_ARM_THM_MOVW_ABS_NC ref_arg1
2c: f2c0 0100 movt r1, #0
2c: R_ARM_THM_MOVT_ABS ref_arg1
30: 9400 str r4, [sp, #0]
32: f7ff fffe bl 0 <matvec_floatarr_floatarr>
32: R_ARM_THM_CALL aux_arr_matvec_float_float
36: b002 add sp, #8
38: e8bd 4010 ldmia.w sp!, {r4, lr}
3c: f7ff bffe b.w 0 <result_float_ref>
3c: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <matvec_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <matvec_floatarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <matvec_floatarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: b082 sub sp, #8
a: 681b ldr r3, [r3, #0]
c: 4a07 ldr r2, [pc, #28] @ (2c <matvec_floatarr_floatarr+0x2c>)
e: 4908 ldr r1, [pc, #32] @ (30 <matvec_floatarr_floatarr+0x30>)
10: 4808 ldr r0, [pc, #32] @ (34 <matvec_floatarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <matvec_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_matvec_float_float
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matvec_floatarr_floatarr>:
0: 00000717 auipc a4,0x0
0: R_RISCV_PCREL_HI20 ref_arg3
4: 00072703 lw a4,0(a4) # 0 <matvec_floatarr_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000697 auipc a3,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0006a683 lw a3,0(a3) # 8 <matvec_floatarr_floatarr+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_float_float
30: 000080e7 jalr ra # 2c <matvec_floatarr_floatarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <matvec_floatarr_floatarr+0x38>
riscv64#
0000000000000000 <matvec_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00072703 lw a4,0(a4) # 2 <matvec_floatarr_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 0006a683 lw a3,0(a3) # a <matvec_floatarr_floatarr+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_matvec_float_float
30: 000080e7 jalr ra # 2c <matvec_floatarr_floatarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <matvec_floatarr_floatarr+0x38>
tricore#
00000000 <matvec_floatarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <matvec_floatarr_floatarr>>
4: R_TRICORE_LO2 ref_arg3
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg2
c: 19 24 00 00 ld.w %d4,[%a2]0 <0 <matvec_floatarr_floatarr>>
c: R_TRICORE_LO2 ref_arg2
10: 91 00 00 60 movh.a %a6,0
10: R_TRICORE_HIADJ ref_out
14: 91 00 00 50 movh.a %a5,0
14: R_TRICORE_HIADJ ref_arg1
18: 91 00 00 40 movh.a %a4,0
18: R_TRICORE_HIADJ ref_arg0
1c: d9 66 00 00 lea %a6,[%a6]0 <0 <matvec_floatarr_floatarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 55 00 00 lea %a5,[%a5]0 <0 <matvec_floatarr_floatarr>>
20: R_TRICORE_LO2 ref_arg1
24: d9 44 00 00 lea %a4,[%a4]0 <0 <matvec_floatarr_floatarr>>
24: R_TRICORE_LO2 ref_arg0
28: 6d 00 00 00 call 28 <matvec_floatarr_floatarr+0x28>
28: R_TRICORE_24REL aux_arr_matvec_float_float
2c: 1d 00 00 00 j 2c <matvec_floatarr_floatarr+0x2c>
2c: R_TRICORE_24REL result_float_ref
x86#
00000000 <matvec_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg3
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg2
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_out
14: 68 00 00 00 00 push $0x0
15: R_386_32 ref_arg1
19: 68 00 00 00 00 push $0x0
1a: R_386_32 ref_arg0
1e: e8 fc ff ff ff call 1f <matvec_floatarr_floatarr+0x1f>
1f: R_386_PC32 aux_arr_matvec_float_float
23: 83 c4 20 add $0x20,%esp
26: e9 fc ff ff ff jmp 27 <matvec_floatarr_floatarr+0x27>
27: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <matvec_floatarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <matvec_floatarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <matvec_floatarr_floatarr+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: 44 8b 00 mov (%rax),%r8d
15: 8b 09 mov (%rcx),%ecx
17: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 1e <matvec_floatarr_floatarr+0x1e>
1a: R_X86_64_PC32 ref_out-0x4
1e: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 25 <matvec_floatarr_floatarr+0x25>
21: R_X86_64_PC32 ref_arg1-0x4
25: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 2c <matvec_floatarr_floatarr+0x2c>
28: R_X86_64_PC32 ref_arg0-0x4
2c: e8 00 00 00 00 call 31 <matvec_floatarr_floatarr+0x31>
2d: R_X86_64_PLT32 aux_arr_matvec_float_float-0x4
31: 48 83 c4 08 add $0x8,%rsp
35: e9 00 00 00 00 jmp 3a <.LC0+0x2>
36: R_X86_64_PLT32 result_float_ref-0x4
matmul_floatarr_floatarr#
STENCIL void matmul_floatarr_floatarr(void) {
// Matrix product of a row-major m x k and a k x n matrix,
// the dimensions are passed as int array [m, k, n]
aux_arr_matmul_float_float(REF(ref_arg0), REF(ref_arg1), REF(ref_out), REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <matmul_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000002 adrp x2, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000063 add x3, x3, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
14: 91000042 add x2, x2, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000001 adrp x1, 0 <ref_arg1>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
1c: 90000000 adrp x0, 0 <ref_arg0>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
20: 91000021 add x1, x1, #0x0
20: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
24: 91000000 add x0, x0, #0x0
24: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
28: 94000000 bl 0 <matmul_floatarr_floatarr>
28: R_AARCH64_CALL26 aux_arr_matmul_float_float
2c: a8c17bfd ldp x29, x30, [sp], #16
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <matmul_floatarr_floatarr>:
0: e92d4010 push {r4, lr}
4: e59f3014 ldr r3, [pc, #20] @ 20 <matmul_floatarr_floatarr+0x20>
8: e59f2014 ldr r2, [pc, #20] @ 24 <matmul_floatarr_floatarr+0x24>
c: e59f1014 ldr r1, [pc, #20] @ 28 <matmul_floatarr_floatarr+0x28>
10: e59f0014 ldr r0, [pc, #20] @ 2c <matmul_floatarr_floatarr+0x2c>
14: ebfffffe bl 0 <matmul_floatarr_floatarr>
14: R_ARM_CALL aux_arr_matmul_float_float
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_ref>
1c: R_ARM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg1
2c: R_ARM_ABS32 ref_arg0
armv7#
00000000 <matmul_floatarr_floatarr>:
0: e92d4010 push {r4, lr}
4: e3003000 movw r3, #0
4: R_ARM_MOVW_ABS_NC ref_arg2
8: e3403000 movt r3, #0
8: R_ARM_MOVT_ABS ref_arg2
c: e3002000 movw r2, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3402000 movt r2, #0
10: R_ARM_MOVT_ABS ref_out
14: e3001000 movw r1, #0
14: R_ARM_MOVW_ABS_NC ref_arg1
18: e3401000 movt r1, #0
18: R_ARM_MOVT_ABS ref_arg1
1c: e3000000 movw r0, #0
1c: R_ARM_MOVW_ABS_NC ref_arg0
20: e3400000 movt r0, #0
20: R_ARM_MOVT_ABS ref_arg0
24: ebfffffe bl 0 <matmul_floatarr_floatarr>
24: R_ARM_CALL aux_arr_matmul_float_float
28: e8bd4010 pop {r4, lr}
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <matmul_floatarr_floatarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_floatarr_floatarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_floatarr_floatarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_floatarr_floatarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_floatarr_floatarr+0x24>)
a: f7ff fffe bl 0 <matmul_floatarr_floatarr>
a: R_ARM_THM_CALL aux_arr_matmul_float_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <matmul_floatarr_floatarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_floatarr_floatarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_floatarr_floatarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_floatarr_floatarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_floatarr_floatarr+0x24>)
a: f7ff fffe bl 0 <matmul_floatarr_floatarr>
a: R_ARM_THM_CALL aux_arr_matmul_float_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <matmul_floatarr_floatarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_out
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_out
a: f240 0300 movw r3, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg2
e: f2c0 0300 movt r3, #0
e: R_ARM_THM_MOVT_ABS ref_arg2
12: f240 0100 movw r1, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg1
16: f2c0 0100 movt r1, #0
16: R_ARM_THM_MOVT_ABS ref_arg1
1a: f240 0000 movw r0, #0
1a: R_ARM_THM_MOVW_ABS_NC ref_arg0
1e: f2c0 0000 movt r0, #0
1e: R_ARM_THM_MOVT_ABS ref_arg0
22: f7ff fffe bl 0 <matmul_floatarr_floatarr>
22: R_ARM_THM_CALL aux_arr_matmul_float_float
26: e8bd 4008 ldmia.w sp!, {r3, lr}
2a: f7ff bffe b.w 0 <result_float_ref>
2a: R_ARM_THM_JUMP24 result_float_ref
2e: bf00 nop
armv81mthumb#
00000000 <matmul_floatarr_floatarr>:
0: b508 push {r3, lr}
2: 4a05 ldr r2, [pc, #20] @ (18 <matmul_floatarr_floatarr+0x18>)
4: 4b05 ldr r3, [pc, #20] @ (1c <matmul_floatarr_floatarr+0x1c>)
6: 4906 ldr r1, [pc, #24] @ (20 <matmul_floatarr_floatarr+0x20>)
8: 4806 ldr r0, [pc, #24] @ (24 <matmul_floatarr_floatarr+0x24>)
a: f7ff fffe bl 0 <matmul_floatarr_floatarr>
a: R_ARM_THM_CALL aux_arr_matmul_float_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg2
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <matmul_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: c606 sw ra,12(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_float_float
28: 000080e7 jalr ra # 24 <matmul_floatarr_floatarr+0x24>
2c: 40b2 lw ra,12(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <matmul_floatarr_floatarr+0x30>
riscv64#
0000000000000000 <matmul_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000697 auipc a3,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00068693 mv a3,a3
6: R_RISCV_PCREL_LO12_I .L0
a: 00000617 auipc a2,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00060613 mv a2,a2
e: R_RISCV_PCREL_LO12_I .L0
12: 00000597 auipc a1,0x0
12: R_RISCV_PCREL_HI20 ref_arg1
16: 00058593 mv a1,a1
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000517 auipc a0,0x0
1a: R_RISCV_PCREL_HI20 ref_arg0
1e: 00050513 mv a0,a0
1e: R_RISCV_PCREL_LO12_I .L0
22: e406 sd ra,8(sp)
24: 00000097 auipc ra,0x0
24: R_RISCV_CALL_PLT aux_arr_matmul_float_float
28: 000080e7 jalr ra # 24 <matmul_floatarr_floatarr+0x24>
2c: 60a2 ld ra,8(sp)
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <matmul_floatarr_floatarr+0x30>
tricore#
00000000 <matmul_floatarr_floatarr>:
0: 91 00 00 70 movh.a %a7,0
0: R_TRICORE_HIADJ ref_arg2
4: 91 00 00 60 movh.a %a6,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg1
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 77 00 00 lea %a7,[%a7]0 <0 <matmul_floatarr_floatarr>>
10: R_TRICORE_LO2 ref_arg2
14: d9 66 00 00 lea %a6,[%a6]0 <0 <matmul_floatarr_floatarr>>
14: R_TRICORE_LO2 ref_out
18: d9 55 00 00 lea %a5,[%a5]0 <0 <matmul_floatarr_floatarr>>
18: R_TRICORE_LO2 ref_arg1
1c: d9 44 00 00 lea %a4,[%a4]0 <0 <matmul_floatarr_floatarr>>
1c: R_TRICORE_LO2 ref_arg0
20: 6d 00 00 00 call 20 <matmul_floatarr_floatarr+0x20>
20: R_TRICORE_24REL aux_arr_matmul_float_float
24: 1d 00 00 00 j 24 <matmul_floatarr_floatarr+0x24>
24: R_TRICORE_24REL result_float_ref
x86#
00000000 <matmul_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg2
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg1
12: 68 00 00 00 00 push $0x0
13: R_386_32 ref_arg0
17: e8 fc ff ff ff call 18 <matmul_floatarr_floatarr+0x18>
18: R_386_PC32 aux_arr_matmul_float_float
1c: 83 c4 1c add $0x1c,%esp
1f: e9 fc ff ff ff jmp 20 <matmul_floatarr_floatarr+0x20>
20: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <matmul_floatarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # b <matmul_floatarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 12 <matmul_floatarr_floatarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 19 <matmul_floatarr_floatarr+0x19>
15: R_X86_64_PC32 ref_arg1-0x4
19: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 20 <matmul_floatarr_floatarr+0x20>
1c: R_X86_64_PC32 ref_arg0-0x4
20: e8 00 00 00 00 call 25 <matmul_floatarr_floatarr+0x25>
21: R_X86_64_PLT32 aux_arr_matmul_float_float-0x4
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
solve_floatarr_floatarr#
STENCIL void solve_floatarr_floatarr(void) {
// Solution of a linear system
aux_arr_solve_float(REF(ref_arg0), REF(ref_arg1), REF(ref_out), REF(ref_arg3), REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <solve_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000004 adrp x4, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000003 adrp x3, 0 <ref_arg3>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
c: 910003fd mov x29, sp
10: 91000084 add x4, x4, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
14: 91000063 add x3, x3, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg3
18: 90000002 adrp x2, 0 <ref_out>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_out
1c: 90000001 adrp x1, 0 <ref_arg1>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
20: 91000042 add x2, x2, #0x0
20: R_AARCH64_ADD_ABS_LO12_NC ref_out
24: 91000021 add x1, x1, #0x0
24: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
28: 90000000 adrp x0, 0 <ref_arg0>
28: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <solve_floatarr_floatarr>
30: R_AARCH64_CALL26 aux_arr_solve_float
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <solve_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e24dd00c sub sp, sp, #12
8: e59fc020 ldr ip, [pc, #32] @ 30 <solve_floatarr_floatarr+0x30>
c: e59f3020 ldr r3, [pc, #32] @ 34 <solve_floatarr_floatarr+0x34>
10: e59f2020 ldr r2, [pc, #32] @ 38 <solve_floatarr_floatarr+0x38>
14: e59f1020 ldr r1, [pc, #32] @ 3c <solve_floatarr_floatarr+0x3c>
18: e59f0020 ldr r0, [pc, #32] @ 40 <solve_floatarr_floatarr+0x40>
1c: e58dc000 str ip, [sp]
20: ebfffffe bl 0 <solve_floatarr_floatarr>
20: R_ARM_CALL aux_arr_solve_float
24: e28dd00c add sp, sp, #12
28: e49de004 pop {lr} @ (ldr lr, [sp], #4)
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
...
30: R_ARM_ABS32 ref_arg2
34: R_ARM_ABS32 ref_arg3
38: R_ARM_ABS32 ref_out
3c: R_ARM_ABS32 ref_arg1
40: R_ARM_ABS32 ref_arg0
armv7#
00000000 <solve_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e300c000 movw ip, #0
4: R_ARM_MOVW_ABS_NC ref_arg2
8: e340c000 movt ip, #0
8: R_ARM_MOVT_ABS ref_arg2
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg3
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg3
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e3001000 movw r1, #0
20: R_ARM_MOVW_ABS_NC ref_arg1
24: e3401000 movt r1, #0
24: R_ARM_MOVT_ABS ref_arg1
28: e58dc000 str ip, [sp]
2c: e3000000 movw r0, #0
2c: R_ARM_MOVW_ABS_NC ref_arg0
30: e3400000 movt r0, #0
30: R_ARM_MOVT_ABS ref_arg0
34: ebfffffe bl 0 <solve_floatarr_floatarr>
34: R_ARM_CALL aux_arr_solve_float
38: e28dd00c add sp, sp, #12
3c: e49de004 pop {lr} @ (ldr lr, [sp], #4)
40: eafffffe b 0 <result_float_ref>
40: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <solve_floatarr_floatarr>:
0: b510 push {r4, lr}
2: b082 sub sp, #8
4: 4c06 ldr r4, [pc, #24] @ (20 <solve_floatarr_floatarr+0x20>)
6: 4b07 ldr r3, [pc, #28] @ (24 <solve_floatarr_floatarr+0x24>)
8: 4a07 ldr r2, [pc, #28] @ (28 <solve_floatarr_floatarr+0x28>)
a: 4908 ldr r1, [pc, #32] @ (2c <solve_floatarr_floatarr+0x2c>)
c: 4808 ldr r0, [pc, #32] @ (30 <solve_floatarr_floatarr+0x30>)
e: 9400 str r4, [sp, #0]
10: f7ff fffe bl 0 <solve_floatarr_floatarr>
10: R_ARM_THM_CALL aux_arr_solve_float
14: b002 add sp, #8
16: e8bd 4010 ldmia.w sp!, {r4, lr}
1a: f7ff bffe b.w 0 <result_float_ref>
1a: R_ARM_THM_JUMP24 result_float_ref
1e: bf00 nop
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_out
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <solve_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4c07 ldr r4, [pc, #28] @ (20 <solve_floatarr_floatarr+0x20>)
4: b082 sub sp, #8
6: 4b07 ldr r3, [pc, #28] @ (24 <solve_floatarr_floatarr+0x24>)
8: 4a07 ldr r2, [pc, #28] @ (28 <solve_floatarr_floatarr+0x28>)
a: 4908 ldr r1, [pc, #32] @ (2c <solve_floatarr_floatarr+0x2c>)
c: 4808 ldr r0, [pc, #32] @ (30 <solve_floatarr_floatarr+0x30>)
e: 9400 str r4, [sp, #0]
10: f7ff fffe bl 0 <solve_floatarr_floatarr>
10: R_ARM_THM_CALL aux_arr_solve_float
14: b002 add sp, #8
16: e8bd 4010 ldmia.w sp!, {r4, lr}
1a: f7ff bffe b.w 0 <result_float_ref>
1a: R_ARM_THM_JUMP24 result_float_ref
1e: bf00 nop
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_out
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <solve_floatarr_floatarr>:
0: b510 push {r4, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0400 movw r4, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0400 movt r4, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: f240 0100 movw r1, #0
1c: R_ARM_THM_MOVW_ABS_NC ref_arg1
20: f2c0 0100 movt r1, #0
20: R_ARM_THM_MOVT_ABS ref_arg1
24: 9400 str r4, [sp, #0]
26: f240 0000 movw r0, #0
26: R_ARM_THM_MOVW_ABS_NC ref_arg0
2a: f2c0 0000 movt r0, #0
2a: R_ARM_THM_MOVT_ABS ref_arg0
2e: f7ff fffe bl 0 <solve_floatarr_floatarr>
2e: R_ARM_THM_CALL aux_arr_solve_float
32: b002 add sp, #8
34: e8bd 4010 ldmia.w sp!, {r4, lr}
38: f7ff bffe b.w 0 <result_float_ref>
38: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <solve_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4c07 ldr r4, [pc, #28] @ (20 <solve_floatarr_floatarr+0x20>)
4: b082 sub sp, #8
6: 4b07 ldr r3, [pc, #28] @ (24 <solve_floatarr_floatarr+0x24>)
8: 4a07 ldr r2, [pc, #28] @ (28 <solve_floatarr_floatarr+0x28>)
a: 4908 ldr r1, [pc, #32] @ (2c <solve_floatarr_floatarr+0x2c>)
c: 4808 ldr r0, [pc, #32] @ (30 <solve_floatarr_floatarr+0x30>)
e: 9400 str r4, [sp, #0]
10: f7ff fffe bl 0 <solve_floatarr_floatarr>
10: R_ARM_THM_CALL aux_arr_solve_float
14: b002 add sp, #8
16: e8bd 4010 ldmia.w sp!, {r4, lr}
1a: f7ff bffe b.w 0 <result_float_ref>
1a: R_ARM_THM_JUMP24 result_float_ref
1e: bf00 nop
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_out
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <solve_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00070713 mv a4,a4
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg3
e: 00068693 mv a3,a3
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_solve_float
30: 000080e7 jalr ra # 2c <solve_floatarr_floatarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <solve_floatarr_floatarr+0x38>
riscv64#
0000000000000000 <solve_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 00070713 mv a4,a4
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg3
e: 00068693 mv a3,a3
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_solve_float
30: 000080e7 jalr ra # 2c <solve_floatarr_floatarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <solve_floatarr_floatarr+0x38>
tricore#
00000000 <solve_floatarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 20 08 sub.a %sp,8
6: d9 22 00 00 lea %a2,[%a2]0
6: R_TRICORE_LO2 ref_arg2
a: 91 00 00 70 movh.a %a7,0
a: R_TRICORE_HIADJ ref_arg3
e: 91 00 00 60 movh.a %a6,0
e: R_TRICORE_HIADJ ref_out
12: 91 00 00 50 movh.a %a5,0
12: R_TRICORE_HIADJ ref_arg1
16: 91 00 00 40 movh.a %a4,0
16: R_TRICORE_HIADJ ref_arg0
1a: f4 a2 st.a [%sp],%a2
1c: d9 77 00 00 lea %a7,[%a7]0 <0 <solve_floatarr_floatarr>>
1c: R_TRICORE_LO2 ref_arg3
20: d9 66 00 00 lea %a6,[%a6]0 <0 <solve_floatarr_floatarr>>
20: R_TRICORE_LO2 ref_out
24: d9 55 00 00 lea %a5,[%a5]0 <0 <solve_floatarr_floatarr>>
24: R_TRICORE_LO2 ref_arg1
28: d9 44 00 00 lea %a4,[%a4]0 <0 <solve_floatarr_floatarr>>
28: R_TRICORE_LO2 ref_arg0
2c: 6d 00 00 00 call 2c <solve_floatarr_floatarr+0x2c>
2c: R_TRICORE_24REL aux_arr_solve_float
30: d9 aa 08 00 lea %sp,[%sp]8
34: 1d 00 00 00 j 34 <solve_floatarr_floatarr+0x34>
34: R_TRICORE_24REL result_float_ref
x86#
00000000 <solve_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg2
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_arg3
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_out
12: 68 00 00 00 00 push $0x0
13: R_386_32 ref_arg1
17: 68 00 00 00 00 push $0x0
18: R_386_32 ref_arg0
1c: e8 fc ff ff ff call 1d <solve_floatarr_floatarr+0x1d>
1d: R_386_PC32 aux_arr_solve_float
21: 83 c4 20 add $0x20,%esp
24: e9 fc ff ff ff jmp 25 <solve_floatarr_floatarr+0x25>
25: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <solve_floatarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 4c 8d 05 00 00 00 00 lea 0x0(%rip),%r8 # b <solve_floatarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <solve_floatarr_floatarr+0x12>
e: R_X86_64_PC32 ref_arg3-0x4
12: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 19 <solve_floatarr_floatarr+0x19>
15: R_X86_64_PC32 ref_out-0x4
19: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 20 <solve_floatarr_floatarr+0x20>
1c: R_X86_64_PC32 ref_arg1-0x4
20: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 27 <solve_floatarr_floatarr+0x27>
23: R_X86_64_PC32 ref_arg0-0x4
27: e8 00 00 00 00 call 2c <solve_floatarr_floatarr+0x2c>
28: R_X86_64_PLT32 aux_arr_solve_float-0x4
2c: 48 83 c4 08 add $0x8,%rsp
30: e9 00 00 00 00 jmp 35 <.LC1+0x1>
31: R_X86_64_PLT32 result_float_ref-0x4
det_floatarr#
STENCIL void det_floatarr(void) {
// Determinant of a square matrix
*(float *)REF(ref_out) = aux_arr_det_float(REF(ref_arg0), REF(ref_arg2), *(int *)REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <det_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <det_floatarr>
20: R_AARCH64_CALL26 aux_arr_det_float
24: a8c17bfd ldp x29, x30, [sp], #16
28: 90000000 adrp x0, 0 <ref_out>
28: R_AARCH64_ADR_PREL_PG_HI21 ref_out
2c: bd000000 str s0, [x0]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <det_floatarr>:
0: e59f3020 ldr r3, [pc, #32] @ 28 <det_floatarr+0x28>
4: e92d4010 push {r4, lr}
8: e5932000 ldr r2, [r3]
c: e59f1018 ldr r1, [pc, #24] @ 2c <det_floatarr+0x2c>
10: e59f0018 ldr r0, [pc, #24] @ 30 <det_floatarr+0x30>
14: ebfffffe bl 0 <det_floatarr>
14: R_ARM_CALL aux_arr_det_float
18: e59f3014 ldr r3, [pc, #20] @ 34 <det_floatarr+0x34>
1c: e8bd4010 pop {r4, lr}
20: ed830a00 vstr s0, [r3]
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
...
28: R_ARM_ABS32 ref_arg1
2c: R_ARM_ABS32 ref_arg2
30: R_ARM_ABS32 ref_arg0
34: R_ARM_ABS32 ref_out
armv7#
00000000 <det_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_arg2
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_arg2
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <det_floatarr>
20: R_ARM_CALL aux_arr_det_float
24: e3003000 movw r3, #0
24: R_ARM_MOVW_ABS_NC ref_out
28: e3403000 movt r3, #0
28: R_ARM_MOVT_ABS ref_out
2c: e8bd4010 pop {r4, lr}
30: ed830a00 vstr s0, [r3]
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <det_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <det_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <det_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <det_floatarr+0x24>)
a: f7ff fffe bl 0 <det_floatarr>
a: R_ARM_THM_CALL aux_arr_det_float
e: 4b06 ldr r3, [pc, #24] @ (28 <det_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <det_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <det_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <det_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <det_floatarr+0x24>)
a: f7ff fffe bl 0 <det_floatarr>
a: R_ARM_THM_CALL aux_arr_det_float
e: 4b06 ldr r3, [pc, #24] @ (28 <det_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <det_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg2
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_arg2
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <det_floatarr>
1c: R_ARM_THM_CALL aux_arr_det_float
20: f240 0300 movw r3, #0
20: R_ARM_THM_MOVW_ABS_NC ref_out
24: f2c0 0300 movt r3, #0
24: R_ARM_THM_MOVT_ABS ref_out
28: ed83 0a00 vstr s0, [r3]
2c: e8bd 4008 ldmia.w sp!, {r3, lr}
30: f7ff bffe b.w 0 <result_float_ref>
30: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <det_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <det_floatarr+0x1c>)
4: 4906 ldr r1, [pc, #24] @ (20 <det_floatarr+0x20>)
6: 681a ldr r2, [r3, #0]
8: 4806 ldr r0, [pc, #24] @ (24 <det_floatarr+0x24>)
a: f7ff fffe bl 0 <det_floatarr>
a: R_ARM_THM_CALL aux_arr_det_float
e: 4b06 ldr r3, [pc, #24] @ (28 <det_floatarr+0x28>)
10: ed83 0a00 vstr s0, [r3]
14: e8bd 4008 ldmia.w sp!, {r3, lr}
18: f7ff bffe b.w 0 <result_float_ref>
18: R_ARM_THM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg0
28: R_ARM_ABS32 ref_out
riscv32#
00000000 <det_floatarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 00062603 lw a2,0(a2) # 0 <det_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_det_float
20: 000080e7 jalr ra # 1c <det_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00078793 mv a5,a5
2a: R_RISCV_PCREL_LO12_I .L0
2e: e388 fsw fa0,0(a5)
30: 0141 addi sp,sp,16
32: 00000317 auipc t1,0x0
32: R_RISCV_CALL_PLT result_float_ref
36: 00030067 jr t1 # 32 <det_floatarr+0x32>
riscv64#
0000000000000000 <det_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00062603 lw a2,0(a2) # 2 <det_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_det_float
20: 000080e7 jalr ra # 1c <det_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a027 fsw fa0,0(a5) # 26 <det_floatarr+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <det_floatarr+0x30>
tricore#
00000000 <det_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <det_floatarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_arg2
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <det_floatarr>>
10: R_TRICORE_LO2 ref_arg2
14: d9 44 00 00 lea %a4,[%a4]0 <0 <det_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <det_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_det_float
1c: 91 00 00 20 movh.a %a2,0
1c: R_TRICORE_HIADJ ref_out
20: d9 22 00 00 lea %a2,[%a2]0 <0 <det_floatarr>>
20: R_TRICORE_LO2 ref_out
24: 74 22 st.w [%a2],%d2
26: 1d 00 00 00 j 26 <det_floatarr+0x26>
26: R_TRICORE_24REL result_float_ref
x86#
00000000 <det_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg2
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <det_floatarr+0x14>
14: R_386_PC32 aux_arr_det_float
18: d9 1d 00 00 00 00 fstps 0x0
1a: R_386_32 ref_out
1e: 83 c4 18 add $0x18,%esp
21: e9 fc ff ff ff jmp 22 <det_floatarr+0x22>
22: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <det_floatarr>:
0: 53 push %rbx
1: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 8 <det_floatarr+0x8>
4: R_X86_64_PC32 ref_arg1-0x4
8: 8b 10 mov (%rax),%edx
a: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 11 <det_floatarr+0x11>
d: R_X86_64_PC32 ref_arg2-0x4
11: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 18 <det_floatarr+0x18>
14: R_X86_64_PC32 ref_arg0-0x4
18: e8 00 00 00 00 call 1d <det_floatarr+0x1d>
19: R_X86_64_PLT32 aux_arr_det_float-0x4
1d: 48 8d 1d 00 00 00 00 lea 0x0(%rip),%rbx # 24 <det_floatarr+0x24>
20: R_X86_64_PC32 ref_out-0x4
24: f3 0f 11 03 movss %xmm0,(%rbx)
28: 5b pop %rbx
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
lerp_floatarr_float#
STENCIL void lerp_floatarr_float(void) {
// Table lookup at a fractional index
*(float *)REF(ref_out) = aux_arr_lerp_float(REF(ref_arg0), *(float *)REF(ref_arg1), *(int *)REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <lerp_floatarr_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000002 adrp x2, 0 <ref_arg1>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
14: 90000000 adrp x0, 0 <ref_arg0>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
18: bd400040 ldr s0, [x2]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <lerp_floatarr_float>
20: R_AARCH64_CALL26 aux_arr_lerp_float
24: 90000000 adrp x0, 0 <ref_out>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_out
28: a8c17bfd ldp x29, x30, [sp], #16
2c: bd000000 str s0, [x0]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <lerp_floatarr_float>:
0: e59f3024 ldr r3, [pc, #36] @ 2c <lerp_floatarr_float+0x2c>
4: e59f2024 ldr r2, [pc, #36] @ 30 <lerp_floatarr_float+0x30>
8: e92d4010 push {r4, lr}
c: ed930a00 vldr s0, [r3]
10: e5921000 ldr r1, [r2]
14: e59f0018 ldr r0, [pc, #24] @ 34 <lerp_floatarr_float+0x34>
18: ebfffffe bl 0 <lerp_floatarr_float>
18: R_ARM_CALL aux_arr_lerp_float
1c: e59f3014 ldr r3, [pc, #20] @ 38 <lerp_floatarr_float+0x38>
20: e8bd4010 pop {r4, lr}
24: ed830a00 vstr s0, [r3]
28: eafffffe b 0 <result_float_ref>
28: R_ARM_JUMP24 result_float_ref
...
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg2
34: R_ARM_ABS32 ref_arg0
38: R_ARM_ABS32 ref_out
armv7#
00000000 <lerp_floatarr_float>:
0: e3002000 movw r2, #0
0: R_ARM_MOVW_ABS_NC ref_arg2
4: e3402000 movt r2, #0
4: R_ARM_MOVT_ABS ref_arg2
8: e3003000 movw r3, #0
8: R_ARM_MOVW_ABS_NC ref_arg1
c: e3403000 movt r3, #0
c: R_ARM_MOVT_ABS ref_arg1
10: e92d4010 push {r4, lr}
14: e3000000 movw r0, #0
14: R_ARM_MOVW_ABS_NC ref_arg0
18: e3400000 movt r0, #0
18: R_ARM_MOVT_ABS ref_arg0
1c: ed930a00 vldr s0, [r3]
20: e5921000 ldr r1, [r2]
24: ebfffffe bl 0 <lerp_floatarr_float>
24: R_ARM_CALL aux_arr_lerp_float
28: e3003000 movw r3, #0
28: R_ARM_MOVW_ABS_NC ref_out
2c: e3403000 movt r3, #0
2c: R_ARM_MOVT_ABS ref_out
30: e8bd4010 pop {r4, lr}
34: ed830a00 vstr s0, [r3]
38: eafffffe b 0 <result_float_ref>
38: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <lerp_floatarr_float>:
0: b508 push {r3, lr}
2: 4a07 ldr r2, [pc, #28] @ (20 <lerp_floatarr_float+0x20>)
4: 4b07 ldr r3, [pc, #28] @ (24 <lerp_floatarr_float+0x24>)
6: 6811 ldr r1, [r2, #0]
8: ed93 0a00 vldr s0, [r3]
c: 4806 ldr r0, [pc, #24] @ (28 <lerp_floatarr_float+0x28>)
e: f7ff fffe bl 0 <lerp_floatarr_float>
e: R_ARM_THM_CALL aux_arr_lerp_float
12: 4b06 ldr r3, [pc, #24] @ (2c <lerp_floatarr_float+0x2c>)
14: ed83 0a00 vstr s0, [r3]
18: e8bd 4008 ldmia.w sp!, {r3, lr}
1c: f7ff bffe b.w 0 <result_float_ref>
1c: R_ARM_THM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <lerp_floatarr_float>:
0: b508 push {r3, lr}
2: 4a07 ldr r2, [pc, #28] @ (20 <lerp_floatarr_float+0x20>)
4: 4b07 ldr r3, [pc, #28] @ (24 <lerp_floatarr_float+0x24>)
6: 6811 ldr r1, [r2, #0]
8: ed93 0a00 vldr s0, [r3]
c: 4806 ldr r0, [pc, #24] @ (28 <lerp_floatarr_float+0x28>)
e: f7ff fffe bl 0 <lerp_floatarr_float>
e: R_ARM_THM_CALL aux_arr_lerp_float
12: 4b06 ldr r3, [pc, #24] @ (2c <lerp_floatarr_float+0x2c>)
14: ed83 0a00 vstr s0, [r3]
18: e8bd 4008 ldmia.w sp!, {r3, lr}
1c: f7ff bffe b.w 0 <result_float_ref>
1c: R_ARM_THM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <lerp_floatarr_float>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg2
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_arg2
a: f240 0300 movw r3, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg1
e: f2c0 0300 movt r3, #0
e: R_ARM_THM_MOVT_ABS ref_arg1
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 6811 ldr r1, [r2, #0]
1c: ed93 0a00 vldr s0, [r3]
20: f7ff fffe bl 0 <lerp_floatarr_float>
20: R_ARM_THM_CALL aux_arr_lerp_float
24: f240 0300 movw r3, #0
24: R_ARM_THM_MOVW_ABS_NC ref_out
28: f2c0 0300 movt r3, #0
28: R_ARM_THM_MOVT_ABS ref_out
2c: ed83 0a00 vstr s0, [r3]
30: e8bd 4008 ldmia.w sp!, {r3, lr}
34: f7ff bffe b.w 0 <result_float_ref>
34: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <lerp_floatarr_float>:
0: b508 push {r3, lr}
2: 4a07 ldr r2, [pc, #28] @ (20 <lerp_floatarr_float+0x20>)
4: 4b07 ldr r3, [pc, #28] @ (24 <lerp_floatarr_float+0x24>)
6: 6811 ldr r1, [r2, #0]
8: ed93 0a00 vldr s0, [r3]
c: 4806 ldr r0, [pc, #24] @ (28 <lerp_floatarr_float+0x28>)
e: f7ff fffe bl 0 <lerp_floatarr_float>
e: R_ARM_THM_CALL aux_arr_lerp_float
12: 4b06 ldr r3, [pc, #24] @ (2c <lerp_floatarr_float+0x2c>)
14: ed83 0a00 vstr s0, [r3]
18: e8bd 4008 ldmia.w sp!, {r3, lr}
1c: f7ff bffe b.w 0 <result_float_ref>
1c: R_ARM_THM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
riscv32#
00000000 <lerp_floatarr_float>:
0: 00000797 auipc a5,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0007a507 flw fa0,0(a5) # 0 <lerp_floatarr_float>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000597 auipc a1,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0005a583 lw a1,0(a1) # 8 <lerp_floatarr_float+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_lerp_float
20: 000080e7 jalr ra # 1c <lerp_floatarr_float+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00078793 mv a5,a5
2a: R_RISCV_PCREL_LO12_I .L0
2e: e388 fsw fa0,0(a5)
30: 0141 addi sp,sp,16
32: 00000317 auipc t1,0x0
32: R_RISCV_CALL_PLT result_float_ref
36: 00030067 jr t1 # 32 <lerp_floatarr_float+0x32>
riscv64#
0000000000000000 <lerp_floatarr_float>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 0005a583 lw a1,0(a1) # 2 <lerp_floatarr_float+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000797 auipc a5,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 0007a507 flw fa0,0(a5) # a <lerp_floatarr_float+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_lerp_float
20: 000080e7 jalr ra # 1c <lerp_floatarr_float+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a027 fsw fa0,0(a5) # 26 <lerp_floatarr_float+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <lerp_floatarr_float+0x30>
tricore#
00000000 <lerp_floatarr_float>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <lerp_floatarr_float>>
4: R_TRICORE_LO2 ref_arg2
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg1
c: d9 22 00 00 lea %a2,[%a2]0 <0 <lerp_floatarr_float>>
c: R_TRICORE_LO2 ref_arg1
10: 54 24 ld.w %d4,[%a2]
12: 91 00 00 40 movh.a %a4,0
12: R_TRICORE_HIADJ ref_arg0
16: d9 44 00 00 lea %a4,[%a4]0 <0 <lerp_floatarr_float>>
16: R_TRICORE_LO2 ref_arg0
1a: 6d 00 00 00 call 1a <lerp_floatarr_float+0x1a>
1a: R_TRICORE_24REL aux_arr_lerp_float
1e: 91 00 00 20 movh.a %a2,0
1e: R_TRICORE_HIADJ ref_out
22: d9 22 00 00 lea %a2,[%a2]0 <0 <lerp_floatarr_float>>
22: R_TRICORE_LO2 ref_out
26: 74 22 st.w [%a2],%d2
28: 1d 00 00 00 j 28 <lerp_floatarr_float+0x28>
28: R_TRICORE_24REL result_float_ref
x86#
00000000 <lerp_floatarr_float>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg2
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg1
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_arg0
14: e8 fc ff ff ff call 15 <lerp_floatarr_float+0x15>
15: R_386_PC32 aux_arr_lerp_float
19: d9 1d 00 00 00 00 fstps 0x0
1b: R_386_32 ref_out
1f: 83 c4 18 add $0x18,%esp
22: e9 fc ff ff ff jmp 23 <lerp_floatarr_float+0x23>
23: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <lerp_floatarr_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <lerp_floatarr_float+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <lerp_floatarr_float+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: f3 0f 10 00 movss (%rax),%xmm0
16: 8b 31 mov (%rcx),%esi
18: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1f <lerp_floatarr_float+0x1f>
1b: R_X86_64_PC32 ref_arg0-0x4
1f: e8 00 00 00 00 call 24 <lerp_floatarr_float+0x24>
20: R_X86_64_PLT32 aux_arr_lerp_float-0x4
24: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 2b <lerp_floatarr_float+0x2b>
27: R_X86_64_PC32 ref_out-0x4
2b: f3 0f 11 02 movss %xmm0,(%rdx)
2f: 48 83 c4 08 add $0x8,%rsp
33: e9 00 00 00 00 jmp 38 <.LC0>
34: R_X86_64_PLT32 result_float_ref-0x4
lerp_floatarr_floatarr#
STENCIL void lerp_floatarr_floatarr(void) {
// Table lookup at a fractional index, element-wise for an array of positions
aux_arr_lerp_floatarr(REF(ref_arg0), REF(ref_arg1), REF(ref_out), *(int *)REF(ref_arg2), *(int *)REF(ref_arg3));
result_float_ref();
}
arm64#
0000000000000000 <lerp_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000000 adrp x0, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400064 ldr w4, [x3]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg3
14: 90000002 adrp x2, 0 <ref_out>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_out
18: b9400003 ldr w3, [x0]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
1c: 91000042 add x2, x2, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_out
20: 90000001 adrp x1, 0 <ref_arg1>
20: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
24: 90000000 adrp x0, 0 <ref_arg0>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
28: 91000021 add x1, x1, #0x0
28: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <lerp_floatarr_floatarr>
30: R_AARCH64_CALL26 aux_arr_lerp_floatarr
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <lerp_floatarr_floatarr>:
0: e59f1030 ldr r1, [pc, #48] @ 38 <lerp_floatarr_floatarr+0x38>
4: e59f3030 ldr r3, [pc, #48] @ 3c <lerp_floatarr_floatarr+0x3c>
8: e52de004 push {lr} @ (str lr, [sp, #-4]!)
c: e24dd00c sub sp, sp, #12
10: e591c000 ldr ip, [r1]
14: e5933000 ldr r3, [r3]
18: e59f2020 ldr r2, [pc, #32] @ 40 <lerp_floatarr_floatarr+0x40>
1c: e59f1020 ldr r1, [pc, #32] @ 44 <lerp_floatarr_floatarr+0x44>
20: e59f0020 ldr r0, [pc, #32] @ 48 <lerp_floatarr_floatarr+0x48>
24: e58dc000 str ip, [sp]
28: ebfffffe bl 0 <lerp_floatarr_floatarr>
28: R_ARM_CALL aux_arr_lerp_floatarr
2c: e28dd00c add sp, sp, #12
30: e49de004 pop {lr} @ (ldr lr, [sp], #4)
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
...
38: R_ARM_ABS32 ref_arg3
3c: R_ARM_ABS32 ref_arg2
40: R_ARM_ABS32 ref_out
44: R_ARM_ABS32 ref_arg1
48: R_ARM_ABS32 ref_arg0
armv7#
00000000 <lerp_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3001000 movw r1, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e3401000 movt r1, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg2
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg2
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e591c000 ldr ip, [r1]
24: e3000000 movw r0, #0
24: R_ARM_MOVW_ABS_NC ref_arg0
28: e3400000 movt r0, #0
28: R_ARM_MOVT_ABS ref_arg0
2c: e5933000 ldr r3, [r3]
30: e3001000 movw r1, #0
30: R_ARM_MOVW_ABS_NC ref_arg1
34: e3401000 movt r1, #0
34: R_ARM_MOVT_ABS ref_arg1
38: e58dc000 str ip, [sp]
3c: ebfffffe bl 0 <lerp_floatarr_floatarr>
3c: R_ARM_CALL aux_arr_lerp_floatarr
40: e28dd00c add sp, sp, #12
44: e49de004 pop {lr} @ (ldr lr, [sp], #4)
48: eafffffe b 0 <result_float_ref>
48: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <lerp_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <lerp_floatarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <lerp_floatarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: 681b ldr r3, [r3, #0]
a: 4a08 ldr r2, [pc, #32] @ (2c <lerp_floatarr_floatarr+0x2c>)
c: 4908 ldr r1, [pc, #32] @ (30 <lerp_floatarr_floatarr+0x30>)
e: 4809 ldr r0, [pc, #36] @ (34 <lerp_floatarr_floatarr+0x34>)
10: b082 sub sp, #8
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <lerp_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_lerp_floatarr
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <lerp_floatarr_floatarr>:
0: 4808 ldr r0, [pc, #32] @ (24 <lerp_floatarr_floatarr+0x24>)
2: 4b09 ldr r3, [pc, #36] @ (28 <lerp_floatarr_floatarr+0x28>)
4: 4a09 ldr r2, [pc, #36] @ (2c <lerp_floatarr_floatarr+0x2c>)
6: 681b ldr r3, [r3, #0]
8: 4909 ldr r1, [pc, #36] @ (30 <lerp_floatarr_floatarr+0x30>)
a: b510 push {r4, lr}
c: 6804 ldr r4, [r0, #0]
e: b082 sub sp, #8
10: 4808 ldr r0, [pc, #32] @ (34 <lerp_floatarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <lerp_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_lerp_floatarr
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <lerp_floatarr_floatarr>:
0: b510 push {r4, lr}
2: f240 0100 movw r1, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0100 movt r1, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0300 movw r3, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0300 movt r3, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: 680c ldr r4, [r1, #0]
1e: f240 0000 movw r0, #0
1e: R_ARM_THM_MOVW_ABS_NC ref_arg0
22: f2c0 0000 movt r0, #0
22: R_ARM_THM_MOVT_ABS ref_arg0
26: 681b ldr r3, [r3, #0]
28: f240 0100 movw r1, #0
28: R_ARM_THM_MOVW_ABS_NC ref_arg1
2c: f2c0 0100 movt r1, #0
2c: R_ARM_THM_MOVT_ABS ref_arg1
30: 9400 str r4, [sp, #0]
32: f7ff fffe bl 0 <lerp_floatarr_floatarr>
32: R_ARM_THM_CALL aux_arr_lerp_floatarr
36: b002 add sp, #8
38: e8bd 4010 ldmia.w sp!, {r4, lr}
3c: f7ff bffe b.w 0 <result_float_ref>
3c: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <lerp_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <lerp_floatarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <lerp_floatarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: b082 sub sp, #8
a: 681b ldr r3, [r3, #0]
c: 4a07 ldr r2, [pc, #28] @ (2c <lerp_floatarr_floatarr+0x2c>)
e: 4908 ldr r1, [pc, #32] @ (30 <lerp_floatarr_floatarr+0x30>)
10: 4808 ldr r0, [pc, #32] @ (34 <lerp_floatarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <lerp_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_lerp_floatarr
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <lerp_floatarr_floatarr>:
0: 00000717 auipc a4,0x0
0: R_RISCV_PCREL_HI20 ref_arg3
4: 00072703 lw a4,0(a4) # 0 <lerp_floatarr_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000697 auipc a3,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0006a683 lw a3,0(a3) # 8 <lerp_floatarr_floatarr+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_lerp_floatarr
30: 000080e7 jalr ra # 2c <lerp_floatarr_floatarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <lerp_floatarr_floatarr+0x38>
riscv64#
0000000000000000 <lerp_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00072703 lw a4,0(a4) # 2 <lerp_floatarr_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 0006a683 lw a3,0(a3) # a <lerp_floatarr_floatarr+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_lerp_floatarr
30: 000080e7 jalr ra # 2c <lerp_floatarr_floatarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <lerp_floatarr_floatarr+0x38>
tricore#
00000000 <lerp_floatarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <lerp_floatarr_floatarr>>
4: R_TRICORE_LO2 ref_arg3
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg2
c: 19 24 00 00 ld.w %d4,[%a2]0 <0 <lerp_floatarr_floatarr>>
c: R_TRICORE_LO2 ref_arg2
10: 91 00 00 60 movh.a %a6,0
10: R_TRICORE_HIADJ ref_out
14: 91 00 00 50 movh.a %a5,0
14: R_TRICORE_HIADJ ref_arg1
18: 91 00 00 40 movh.a %a4,0
18: R_TRICORE_HIADJ ref_arg0
1c: d9 66 00 00 lea %a6,[%a6]0 <0 <lerp_floatarr_floatarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 55 00 00 lea %a5,[%a5]0 <0 <lerp_floatarr_floatarr>>
20: R_TRICORE_LO2 ref_arg1
24: d9 44 00 00 lea %a4,[%a4]0 <0 <lerp_floatarr_floatarr>>
24: R_TRICORE_LO2 ref_arg0
28: 6d 00 00 00 call 28 <lerp_floatarr_floatarr+0x28>
28: R_TRICORE_24REL aux_arr_lerp_floatarr
2c: 1d 00 00 00 j 2c <lerp_floatarr_floatarr+0x2c>
2c: R_TRICORE_24REL result_float_ref
x86#
00000000 <lerp_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg3
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg2
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_out
14: 68 00 00 00 00 push $0x0
15: R_386_32 ref_arg1
19: 68 00 00 00 00 push $0x0
1a: R_386_32 ref_arg0
1e: e8 fc ff ff ff call 1f <lerp_floatarr_floatarr+0x1f>
1f: R_386_PC32 aux_arr_lerp_floatarr
23: 83 c4 20 add $0x20,%esp
26: e9 fc ff ff ff jmp 27 <lerp_floatarr_floatarr+0x27>
27: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <lerp_floatarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <lerp_floatarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <lerp_floatarr_floatarr+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: 44 8b 00 mov (%rax),%r8d
15: 8b 09 mov (%rcx),%ecx
17: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 1e <lerp_floatarr_floatarr+0x1e>
1a: R_X86_64_PC32 ref_out-0x4
1e: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 25 <lerp_floatarr_floatarr+0x25>
21: R_X86_64_PC32 ref_arg1-0x4
25: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 2c <lerp_floatarr_floatarr+0x2c>
28: R_X86_64_PC32 ref_arg0-0x4
2c: e8 00 00 00 00 call 31 <lerp_floatarr_floatarr+0x31>
2d: R_X86_64_PLT32 aux_arr_lerp_floatarr-0x4
31: 48 83 c4 08 add $0x8,%rsp
35: e9 00 00 00 00 jmp 3a <.LC0+0x2>
36: R_X86_64_PLT32 result_float_ref-0x4
bsearch_floatarr_float#
STENCIL void bsearch_floatarr_float(void) {
// Fractional index of a value in a grid
*(float *)REF(ref_out) = aux_arr_bsearch_float(REF(ref_arg0), *(float *)REF(ref_arg1), *(int *)REF(ref_arg2));
result_float_ref();
}
arm64#
0000000000000000 <bsearch_floatarr_float>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg2>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
8: 90000002 adrp x2, 0 <ref_arg1>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
14: 90000000 adrp x0, 0 <ref_arg0>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
18: bd400040 ldr s0, [x2]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <bsearch_floatarr_float>
20: R_AARCH64_CALL26 aux_arr_bsearch_float
24: a8c17bfd ldp x29, x30, [sp], #16
28: 90000000 adrp x0, 0 <ref_out>
28: R_AARCH64_ADR_PREL_PG_HI21 ref_out
2c: bd000000 str s0, [x0]
2c: R_AARCH64_LDST32_ABS_LO12_NC ref_out
30: 14000000 b 0 <result_float_ref>
30: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <bsearch_floatarr_float>:
0: e59f3024 ldr r3, [pc, #36] @ 2c <bsearch_floatarr_float+0x2c>
4: e59f2024 ldr r2, [pc, #36] @ 30 <bsearch_floatarr_float+0x30>
8: e92d4010 push {r4, lr}
c: ed930a00 vldr s0, [r3]
10: e5921000 ldr r1, [r2]
14: e59f0018 ldr r0, [pc, #24] @ 34 <bsearch_floatarr_float+0x34>
18: ebfffffe bl 0 <bsearch_floatarr_float>
18: R_ARM_CALL aux_arr_bsearch_float
1c: e59f3014 ldr r3, [pc, #20] @ 38 <bsearch_floatarr_float+0x38>
20: e8bd4010 pop {r4, lr}
24: ed830a00 vstr s0, [r3]
28: eafffffe b 0 <result_float_ref>
28: R_ARM_JUMP24 result_float_ref
...
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg2
34: R_ARM_ABS32 ref_arg0
38: R_ARM_ABS32 ref_out
armv7#
00000000 <bsearch_floatarr_float>:
0: e3002000 movw r2, #0
0: R_ARM_MOVW_ABS_NC ref_arg2
4: e3402000 movt r2, #0
4: R_ARM_MOVT_ABS ref_arg2
8: e3003000 movw r3, #0
8: R_ARM_MOVW_ABS_NC ref_arg1
c: e3403000 movt r3, #0
c: R_ARM_MOVT_ABS ref_arg1
10: e92d4010 push {r4, lr}
14: e3000000 movw r0, #0
14: R_ARM_MOVW_ABS_NC ref_arg0
18: e3400000 movt r0, #0
18: R_ARM_MOVT_ABS ref_arg0
1c: ed930a00 vldr s0, [r3]
20: e5921000 ldr r1, [r2]
24: ebfffffe bl 0 <bsearch_floatarr_float>
24: R_ARM_CALL aux_arr_bsearch_float
28: e3003000 movw r3, #0
28: R_ARM_MOVW_ABS_NC ref_out
2c: e3403000 movt r3, #0
2c: R_ARM_MOVT_ABS ref_out
30: e8bd4010 pop {r4, lr}
34: ed830a00 vstr s0, [r3]
38: eafffffe b 0 <result_float_ref>
38: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <bsearch_floatarr_float>:
0: b508 push {r3, lr}
2: 4a07 ldr r2, [pc, #28] @ (20 <bsearch_floatarr_float+0x20>)
4: 4b07 ldr r3, [pc, #28] @ (24 <bsearch_floatarr_float+0x24>)
6: 6811 ldr r1, [r2, #0]
8: ed93 0a00 vldr s0, [r3]
c: 4806 ldr r0, [pc, #24] @ (28 <bsearch_floatarr_float+0x28>)
e: f7ff fffe bl 0 <bsearch_floatarr_float>
e: R_ARM_THM_CALL aux_arr_bsearch_float
12: 4b06 ldr r3, [pc, #24] @ (2c <bsearch_floatarr_float+0x2c>)
14: ed83 0a00 vstr s0, [r3]
18: e8bd 4008 ldmia.w sp!, {r3, lr}
1c: f7ff bffe b.w 0 <result_float_ref>
1c: R_ARM_THM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <bsearch_floatarr_float>:
0: b508 push {r3, lr}
2: 4a07 ldr r2, [pc, #28] @ (20 <bsearch_floatarr_float+0x20>)
4: 4b07 ldr r3, [pc, #28] @ (24 <bsearch_floatarr_float+0x24>)
6: 6811 ldr r1, [r2, #0]
8: ed93 0a00 vldr s0, [r3]
c: 4806 ldr r0, [pc, #24] @ (28 <bsearch_floatarr_float+0x28>)
e: f7ff fffe bl 0 <bsearch_floatarr_float>
e: R_ARM_THM_CALL aux_arr_bsearch_float
12: 4b06 ldr r3, [pc, #24] @ (2c <bsearch_floatarr_float+0x2c>)
14: ed83 0a00 vstr s0, [r3]
18: e8bd 4008 ldmia.w sp!, {r3, lr}
1c: f7ff bffe b.w 0 <result_float_ref>
1c: R_ARM_THM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <bsearch_floatarr_float>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg2
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_arg2
a: f240 0300 movw r3, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg1
e: f2c0 0300 movt r3, #0
e: R_ARM_THM_MOVT_ABS ref_arg1
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 6811 ldr r1, [r2, #0]
1c: ed93 0a00 vldr s0, [r3]
20: f7ff fffe bl 0 <bsearch_floatarr_float>
20: R_ARM_THM_CALL aux_arr_bsearch_float
24: f240 0300 movw r3, #0
24: R_ARM_THM_MOVW_ABS_NC ref_out
28: f2c0 0300 movt r3, #0
28: R_ARM_THM_MOVT_ABS ref_out
2c: ed83 0a00 vstr s0, [r3]
30: e8bd 4008 ldmia.w sp!, {r3, lr}
34: f7ff bffe b.w 0 <result_float_ref>
34: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <bsearch_floatarr_float>:
0: b508 push {r3, lr}
2: 4a07 ldr r2, [pc, #28] @ (20 <bsearch_floatarr_float+0x20>)
4: 4b07 ldr r3, [pc, #28] @ (24 <bsearch_floatarr_float+0x24>)
6: 6811 ldr r1, [r2, #0]
8: ed93 0a00 vldr s0, [r3]
c: 4806 ldr r0, [pc, #24] @ (28 <bsearch_floatarr_float+0x28>)
e: f7ff fffe bl 0 <bsearch_floatarr_float>
e: R_ARM_THM_CALL aux_arr_bsearch_float
12: 4b06 ldr r3, [pc, #24] @ (2c <bsearch_floatarr_float+0x2c>)
14: ed83 0a00 vstr s0, [r3]
18: e8bd 4008 ldmia.w sp!, {r3, lr}
1c: f7ff bffe b.w 0 <result_float_ref>
1c: R_ARM_THM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg2
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
riscv32#
00000000 <bsearch_floatarr_float>:
0: 00000797 auipc a5,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0007a507 flw fa0,0(a5) # 0 <bsearch_floatarr_float>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000597 auipc a1,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0005a583 lw a1,0(a1) # 8 <bsearch_floatarr_float+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_bsearch_float
20: 000080e7 jalr ra # 1c <bsearch_floatarr_float+0x1c>
24: 40b2 lw ra,12(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00078793 mv a5,a5
2a: R_RISCV_PCREL_LO12_I .L0
2e: e388 fsw fa0,0(a5)
30: 0141 addi sp,sp,16
32: 00000317 auipc t1,0x0
32: R_RISCV_CALL_PLT result_float_ref
36: 00030067 jr t1 # 32 <bsearch_floatarr_float+0x32>
riscv64#
0000000000000000 <bsearch_floatarr_float>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg2
6: 0005a583 lw a1,0(a1) # 2 <bsearch_floatarr_float+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000797 auipc a5,0x0
a: R_RISCV_PCREL_HI20 ref_arg1
e: 0007a507 flw fa0,0(a5) # a <bsearch_floatarr_float+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_bsearch_float
20: 000080e7 jalr ra # 1c <bsearch_floatarr_float+0x1c>
24: 60a2 ld ra,8(sp)
26: 00000797 auipc a5,0x0
26: R_RISCV_PCREL_HI20 ref_out
2a: 00a7a027 fsw fa0,0(a5) # 26 <bsearch_floatarr_float+0x26>
2a: R_RISCV_PCREL_LO12_S .L0
2e: 0141 addi sp,sp,16
30: 00000317 auipc t1,0x0
30: R_RISCV_CALL_PLT result_float_ref
34: 00030067 jr t1 # 30 <bsearch_floatarr_float+0x30>
tricore#
00000000 <bsearch_floatarr_float>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg2
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <bsearch_floatarr_float>>
4: R_TRICORE_LO2 ref_arg2
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg1
c: d9 22 00 00 lea %a2,[%a2]0 <0 <bsearch_floatarr_float>>
c: R_TRICORE_LO2 ref_arg1
10: 54 24 ld.w %d4,[%a2]
12: 91 00 00 40 movh.a %a4,0
12: R_TRICORE_HIADJ ref_arg0
16: d9 44 00 00 lea %a4,[%a4]0 <0 <bsearch_floatarr_float>>
16: R_TRICORE_LO2 ref_arg0
1a: 6d 00 00 00 call 1a <bsearch_floatarr_float+0x1a>
1a: R_TRICORE_24REL aux_arr_bsearch_float
1e: 91 00 00 20 movh.a %a2,0
1e: R_TRICORE_HIADJ ref_out
22: d9 22 00 00 lea %a2,[%a2]0 <0 <bsearch_floatarr_float>>
22: R_TRICORE_LO2 ref_out
26: 74 22 st.w [%a2],%d2
28: 1d 00 00 00 j 28 <bsearch_floatarr_float+0x28>
28: R_TRICORE_24REL result_float_ref
x86#
00000000 <bsearch_floatarr_float>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg2
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg1
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_arg0
14: e8 fc ff ff ff call 15 <bsearch_floatarr_float+0x15>
15: R_386_PC32 aux_arr_bsearch_float
19: d9 1d 00 00 00 00 fstps 0x0
1b: R_386_32 ref_out
1f: 83 c4 18 add $0x18,%esp
22: e9 fc ff ff ff jmp 23 <bsearch_floatarr_float+0x23>
23: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <bsearch_floatarr_float>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # b <bsearch_floatarr_float+0xb>
7: R_X86_64_PC32 ref_arg2-0x4
b: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # 12 <bsearch_floatarr_float+0x12>
e: R_X86_64_PC32 ref_arg1-0x4
12: 8b 32 mov (%rdx),%esi
14: f3 0f 10 00 movss (%rax),%xmm0
18: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1f <bsearch_floatarr_float+0x1f>
1b: R_X86_64_PC32 ref_arg0-0x4
1f: e8 00 00 00 00 call 24 <bsearch_floatarr_float+0x24>
20: R_X86_64_PLT32 aux_arr_bsearch_float-0x4
24: 4c 8d 05 00 00 00 00 lea 0x0(%rip),%r8 # 2b <bsearch_floatarr_float+0x2b>
27: R_X86_64_PC32 ref_out-0x4
2b: f3 41 0f 11 00 movss %xmm0,(%r8)
30: 48 83 c4 08 add $0x8,%rsp
34: e9 00 00 00 00 jmp 39 <.LC0+0x1>
35: R_X86_64_PLT32 result_float_ref-0x4
bsearch_floatarr_floatarr#
STENCIL void bsearch_floatarr_floatarr(void) {
// Fractional index of a value in a grid, element-wise for an array of positions
aux_arr_bsearch_floatarr(REF(ref_arg0), REF(ref_arg1), REF(ref_out), *(int *)REF(ref_arg2), *(int *)REF(ref_arg3));
result_float_ref();
}
arm64#
0000000000000000 <bsearch_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000003 adrp x3, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000000 adrp x0, 0 <ref_arg2>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
c: 910003fd mov x29, sp
10: b9400064 ldr w4, [x3]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg3
14: 90000002 adrp x2, 0 <ref_out>
14: R_AARCH64_ADR_PREL_PG_HI21 ref_out
18: b9400003 ldr w3, [x0]
18: R_AARCH64_LDST32_ABS_LO12_NC ref_arg2
1c: 91000042 add x2, x2, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_out
20: 90000001 adrp x1, 0 <ref_arg1>
20: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
24: 90000000 adrp x0, 0 <ref_arg0>
24: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
28: 91000021 add x1, x1, #0x0
28: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <bsearch_floatarr_floatarr>
30: R_AARCH64_CALL26 aux_arr_bsearch_floatarr
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <bsearch_floatarr_floatarr>:
0: e59f1030 ldr r1, [pc, #48] @ 38 <bsearch_floatarr_floatarr+0x38>
4: e59f3030 ldr r3, [pc, #48] @ 3c <bsearch_floatarr_floatarr+0x3c>
8: e52de004 push {lr} @ (str lr, [sp, #-4]!)
c: e24dd00c sub sp, sp, #12
10: e591c000 ldr ip, [r1]
14: e5933000 ldr r3, [r3]
18: e59f2020 ldr r2, [pc, #32] @ 40 <bsearch_floatarr_floatarr+0x40>
1c: e59f1020 ldr r1, [pc, #32] @ 44 <bsearch_floatarr_floatarr+0x44>
20: e59f0020 ldr r0, [pc, #32] @ 48 <bsearch_floatarr_floatarr+0x48>
24: e58dc000 str ip, [sp]
28: ebfffffe bl 0 <bsearch_floatarr_floatarr>
28: R_ARM_CALL aux_arr_bsearch_floatarr
2c: e28dd00c add sp, sp, #12
30: e49de004 pop {lr} @ (ldr lr, [sp], #4)
34: eafffffe b 0 <result_float_ref>
34: R_ARM_JUMP24 result_float_ref
...
38: R_ARM_ABS32 ref_arg3
3c: R_ARM_ABS32 ref_arg2
40: R_ARM_ABS32 ref_out
44: R_ARM_ABS32 ref_arg1
48: R_ARM_ABS32 ref_arg0
armv7#
00000000 <bsearch_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e3001000 movw r1, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e3401000 movt r1, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_arg2
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_arg2
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_out
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_out
20: e591c000 ldr ip, [r1]
24: e3000000 movw r0, #0
24: R_ARM_MOVW_ABS_NC ref_arg0
28: e3400000 movt r0, #0
28: R_ARM_MOVT_ABS ref_arg0
2c: e5933000 ldr r3, [r3]
30: e3001000 movw r1, #0
30: R_ARM_MOVW_ABS_NC ref_arg1
34: e3401000 movt r1, #0
34: R_ARM_MOVT_ABS ref_arg1
38: e58dc000 str ip, [sp]
3c: ebfffffe bl 0 <bsearch_floatarr_floatarr>
3c: R_ARM_CALL aux_arr_bsearch_floatarr
40: e28dd00c add sp, sp, #12
44: e49de004 pop {lr} @ (ldr lr, [sp], #4)
48: eafffffe b 0 <result_float_ref>
48: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <bsearch_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <bsearch_floatarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <bsearch_floatarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: 681b ldr r3, [r3, #0]
a: 4a08 ldr r2, [pc, #32] @ (2c <bsearch_floatarr_floatarr+0x2c>)
c: 4908 ldr r1, [pc, #32] @ (30 <bsearch_floatarr_floatarr+0x30>)
e: 4809 ldr r0, [pc, #36] @ (34 <bsearch_floatarr_floatarr+0x34>)
10: b082 sub sp, #8
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <bsearch_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_bsearch_floatarr
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <bsearch_floatarr_floatarr>:
0: 4808 ldr r0, [pc, #32] @ (24 <bsearch_floatarr_floatarr+0x24>)
2: 4b09 ldr r3, [pc, #36] @ (28 <bsearch_floatarr_floatarr+0x28>)
4: 4a09 ldr r2, [pc, #36] @ (2c <bsearch_floatarr_floatarr+0x2c>)
6: 681b ldr r3, [r3, #0]
8: 4909 ldr r1, [pc, #36] @ (30 <bsearch_floatarr_floatarr+0x30>)
a: b510 push {r4, lr}
c: 6804 ldr r4, [r0, #0]
e: b082 sub sp, #8
10: 4808 ldr r0, [pc, #32] @ (34 <bsearch_floatarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <bsearch_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_bsearch_floatarr
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <bsearch_floatarr_floatarr>:
0: b510 push {r4, lr}
2: f240 0100 movw r1, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg3
6: f2c0 0100 movt r1, #0
6: R_ARM_THM_MOVT_ABS ref_arg3
a: b082 sub sp, #8
c: f240 0300 movw r3, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg2
10: f2c0 0300 movt r3, #0
10: R_ARM_THM_MOVT_ABS ref_arg2
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_out
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_out
1c: 680c ldr r4, [r1, #0]
1e: f240 0000 movw r0, #0
1e: R_ARM_THM_MOVW_ABS_NC ref_arg0
22: f2c0 0000 movt r0, #0
22: R_ARM_THM_MOVT_ABS ref_arg0
26: 681b ldr r3, [r3, #0]
28: f240 0100 movw r1, #0
28: R_ARM_THM_MOVW_ABS_NC ref_arg1
2c: f2c0 0100 movt r1, #0
2c: R_ARM_THM_MOVT_ABS ref_arg1
30: 9400 str r4, [sp, #0]
32: f7ff fffe bl 0 <bsearch_floatarr_floatarr>
32: R_ARM_THM_CALL aux_arr_bsearch_floatarr
36: b002 add sp, #8
38: e8bd 4010 ldmia.w sp!, {r4, lr}
3c: f7ff bffe b.w 0 <result_float_ref>
3c: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <bsearch_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4a08 ldr r2, [pc, #32] @ (24 <bsearch_floatarr_floatarr+0x24>)
4: 4b08 ldr r3, [pc, #32] @ (28 <bsearch_floatarr_floatarr+0x28>)
6: 6814 ldr r4, [r2, #0]
8: b082 sub sp, #8
a: 681b ldr r3, [r3, #0]
c: 4a07 ldr r2, [pc, #28] @ (2c <bsearch_floatarr_floatarr+0x2c>)
e: 4908 ldr r1, [pc, #32] @ (30 <bsearch_floatarr_floatarr+0x30>)
10: 4808 ldr r0, [pc, #32] @ (34 <bsearch_floatarr_floatarr+0x34>)
12: 9400 str r4, [sp, #0]
14: f7ff fffe bl 0 <bsearch_floatarr_floatarr>
14: R_ARM_THM_CALL aux_arr_bsearch_floatarr
18: b002 add sp, #8
1a: e8bd 4010 ldmia.w sp!, {r4, lr}
1e: f7ff bffe b.w 0 <result_float_ref>
1e: R_ARM_THM_JUMP24 result_float_ref
22: bf00 nop
...
24: R_ARM_ABS32 ref_arg3
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_out
30: R_ARM_ABS32 ref_arg1
34: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <bsearch_floatarr_floatarr>:
0: 00000717 auipc a4,0x0
0: R_RISCV_PCREL_HI20 ref_arg3
4: 00072703 lw a4,0(a4) # 0 <bsearch_floatarr_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 00000697 auipc a3,0x0
8: R_RISCV_PCREL_HI20 ref_arg2
c: 0006a683 lw a3,0(a3) # 8 <bsearch_floatarr_floatarr+0x8>
c: R_RISCV_PCREL_LO12_I .L0
10: 1141 addi sp,sp,-16
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_bsearch_floatarr
30: 000080e7 jalr ra # 2c <bsearch_floatarr_floatarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <bsearch_floatarr_floatarr+0x38>
riscv64#
0000000000000000 <bsearch_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00072703 lw a4,0(a4) # 2 <bsearch_floatarr_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_arg2
e: 0006a683 lw a3,0(a3) # a <bsearch_floatarr_floatarr+0xa>
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_out
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_bsearch_floatarr
30: 000080e7 jalr ra # 2c <bsearch_floatarr_floatarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <bsearch_floatarr_floatarr+0x38>
tricore#
00000000 <bsearch_floatarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 19 25 00 00 ld.w %d5,[%a2]0 <0 <bsearch_floatarr_floatarr>>
4: R_TRICORE_LO2 ref_arg3
8: 91 00 00 20 movh.a %a2,0
8: R_TRICORE_HIADJ ref_arg2
c: 19 24 00 00 ld.w %d4,[%a2]0 <0 <bsearch_floatarr_floatarr>>
c: R_TRICORE_LO2 ref_arg2
10: 91 00 00 60 movh.a %a6,0
10: R_TRICORE_HIADJ ref_out
14: 91 00 00 50 movh.a %a5,0
14: R_TRICORE_HIADJ ref_arg1
18: 91 00 00 40 movh.a %a4,0
18: R_TRICORE_HIADJ ref_arg0
1c: d9 66 00 00 lea %a6,[%a6]0 <0 <bsearch_floatarr_floatarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 55 00 00 lea %a5,[%a5]0 <0 <bsearch_floatarr_floatarr>>
20: R_TRICORE_LO2 ref_arg1
24: d9 44 00 00 lea %a4,[%a4]0 <0 <bsearch_floatarr_floatarr>>
24: R_TRICORE_LO2 ref_arg0
28: 6d 00 00 00 call 28 <bsearch_floatarr_floatarr+0x28>
28: R_TRICORE_24REL aux_arr_bsearch_floatarr
2c: 1d 00 00 00 j 2c <bsearch_floatarr_floatarr+0x2c>
2c: R_TRICORE_24REL result_float_ref
x86#
00000000 <bsearch_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg3
9: ff 35 00 00 00 00 push 0x0
b: R_386_32 ref_arg2
f: 68 00 00 00 00 push $0x0
10: R_386_32 ref_out
14: 68 00 00 00 00 push $0x0
15: R_386_32 ref_arg1
19: 68 00 00 00 00 push $0x0
1a: R_386_32 ref_arg0
1e: e8 fc ff ff ff call 1f <bsearch_floatarr_floatarr+0x1f>
1f: R_386_PC32 aux_arr_bsearch_floatarr
23: 83 c4 20 add $0x20,%esp
26: e9 fc ff ff ff jmp 27 <bsearch_floatarr_floatarr+0x27>
27: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <bsearch_floatarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <bsearch_floatarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <bsearch_floatarr_floatarr+0x12>
e: R_X86_64_PC32 ref_arg2-0x4
12: 44 8b 00 mov (%rax),%r8d
15: 8b 09 mov (%rcx),%ecx
17: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 1e <bsearch_floatarr_floatarr+0x1e>
1a: R_X86_64_PC32 ref_out-0x4
1e: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 25 <bsearch_floatarr_floatarr+0x25>
21: R_X86_64_PC32 ref_arg1-0x4
25: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 2c <bsearch_floatarr_floatarr+0x2c>
28: R_X86_64_PC32 ref_arg0-0x4
2c: e8 00 00 00 00 call 31 <bsearch_floatarr_floatarr+0x31>
2d: R_X86_64_PLT32 aux_arr_bsearch_floatarr-0x4
31: 48 83 c4 08 add $0x8,%rsp
35: e9 00 00 00 00 jmp 3a <.LC0+0x2>
36: R_X86_64_PLT32 result_float_ref-0x4
conv2d_floatarr_floatarr#
STENCIL void conv2d_floatarr_floatarr(void) {
// 2D convolution
aux_arr_conv2d(REF(ref_arg0), REF(ref_arg1), REF(ref_arg2), REF(ref_out), REF(ref_arg3));
result_float_ref();
}
arm64#
0000000000000000 <conv2d_floatarr_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000004 adrp x4, 0 <ref_arg3>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg3
8: 90000003 adrp x3, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000084 add x4, x4, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg3
14: 91000063 add x3, x3, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000002 adrp x2, 0 <ref_arg2>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg2
1c: 90000001 adrp x1, 0 <ref_arg1>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
20: 91000042 add x2, x2, #0x0
20: R_AARCH64_ADD_ABS_LO12_NC ref_arg2
24: 91000021 add x1, x1, #0x0
24: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
28: 90000000 adrp x0, 0 <ref_arg0>
28: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
2c: 91000000 add x0, x0, #0x0
2c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
30: 94000000 bl 0 <conv2d_floatarr_floatarr>
30: R_AARCH64_CALL26 aux_arr_conv2d
34: a8c17bfd ldp x29, x30, [sp], #16
38: 14000000 b 0 <result_float_ref>
38: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <conv2d_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e24dd00c sub sp, sp, #12
8: e59fc020 ldr ip, [pc, #32] @ 30 <conv2d_floatarr_floatarr+0x30>
c: e59f3020 ldr r3, [pc, #32] @ 34 <conv2d_floatarr_floatarr+0x34>
10: e59f2020 ldr r2, [pc, #32] @ 38 <conv2d_floatarr_floatarr+0x38>
14: e59f1020 ldr r1, [pc, #32] @ 3c <conv2d_floatarr_floatarr+0x3c>
18: e59f0020 ldr r0, [pc, #32] @ 40 <conv2d_floatarr_floatarr+0x40>
1c: e58dc000 str ip, [sp]
20: ebfffffe bl 0 <conv2d_floatarr_floatarr>
20: R_ARM_CALL aux_arr_conv2d
24: e28dd00c add sp, sp, #12
28: e49de004 pop {lr} @ (ldr lr, [sp], #4)
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
...
30: R_ARM_ABS32 ref_arg3
34: R_ARM_ABS32 ref_out
38: R_ARM_ABS32 ref_arg2
3c: R_ARM_ABS32 ref_arg1
40: R_ARM_ABS32 ref_arg0
armv7#
00000000 <conv2d_floatarr_floatarr>:
0: e52de004 push {lr} @ (str lr, [sp, #-4]!)
4: e300c000 movw ip, #0
4: R_ARM_MOVW_ABS_NC ref_arg3
8: e340c000 movt ip, #0
8: R_ARM_MOVT_ABS ref_arg3
c: e24dd00c sub sp, sp, #12
10: e3003000 movw r3, #0
10: R_ARM_MOVW_ABS_NC ref_out
14: e3403000 movt r3, #0
14: R_ARM_MOVT_ABS ref_out
18: e3002000 movw r2, #0
18: R_ARM_MOVW_ABS_NC ref_arg2
1c: e3402000 movt r2, #0
1c: R_ARM_MOVT_ABS ref_arg2
20: e3001000 movw r1, #0
20: R_ARM_MOVW_ABS_NC ref_arg1
24: e3401000 movt r1, #0
24: R_ARM_MOVT_ABS ref_arg1
28: e58dc000 str ip, [sp]
2c: e3000000 movw r0, #0
2c: R_ARM_MOVW_ABS_NC ref_arg0
30: e3400000 movt r0, #0
30: R_ARM_MOVT_ABS ref_arg0
34: ebfffffe bl 0 <conv2d_floatarr_floatarr>
34: R_ARM_CALL aux_arr_conv2d
38: e28dd00c add sp, sp, #12
3c: e49de004 pop {lr} @ (ldr lr, [sp], #4)
40: eafffffe b 0 <result_float_ref>
40: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <conv2d_floatarr_floatarr>:
0: b510 push {r4, lr}
2: b082 sub sp, #8
4: 4c06 ldr r4, [pc, #24] @ (20 <conv2d_floatarr_floatarr+0x20>)
6: 4b07 ldr r3, [pc, #28] @ (24 <conv2d_floatarr_floatarr+0x24>)
8: 4a07 ldr r2, [pc, #28] @ (28 <conv2d_floatarr_floatarr+0x28>)
a: 4908 ldr r1, [pc, #32] @ (2c <conv2d_floatarr_floatarr+0x2c>)
c: 4808 ldr r0, [pc, #32] @ (30 <conv2d_floatarr_floatarr+0x30>)
e: 9400 str r4, [sp, #0]
10: f7ff fffe bl 0 <conv2d_floatarr_floatarr>
10: R_ARM_THM_CALL aux_arr_conv2d
14: b002 add sp, #8
16: e8bd 4010 ldmia.w sp!, {r4, lr}
1a: f7ff bffe b.w 0 <result_float_ref>
1a: R_ARM_THM_JUMP24 result_float_ref
1e: bf00 nop
...
20: R_ARM_ABS32 ref_arg3
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <conv2d_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4c07 ldr r4, [pc, #28] @ (20 <conv2d_floatarr_floatarr+0x20>)
4: b082 sub sp, #8
6: 4b07 ldr r3, [pc, #28] @ (24 <conv2d_floatarr_floatarr+0x24>)
8: 4a07 ldr r2, [pc, #28] @ (28 <conv2d_floatarr_floatarr+0x28>)
a: 4908 ldr r1, [pc, #32] @ (2c <conv2d_floatarr_floatarr+0x2c>)
c: 4808 ldr r0, [pc, #32] @ (30 <conv2d_floatarr_floatarr+0x30>)
e: 9400 str r4, [sp, #0]
10: f7ff fffe bl 0 <conv2d_floatarr_floatarr>
10: R_ARM_THM_CALL aux_arr_conv2d
14: b002 add sp, #8
16: e8bd 4010 ldmia.w sp!, {r4, lr}
1a: f7ff bffe b.w 0 <result_float_ref>
1a: R_ARM_THM_JUMP24 result_float_ref
1e: bf00 nop
...
20: R_ARM_ABS32 ref_arg3
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <conv2d_floatarr_floatarr>:
0: b510 push {r4, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_out
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_out
a: b082 sub sp, #8
c: f240 0400 movw r4, #0
c: R_ARM_THM_MOVW_ABS_NC ref_arg3
10: f2c0 0400 movt r4, #0
10: R_ARM_THM_MOVT_ABS ref_arg3
14: f240 0200 movw r2, #0
14: R_ARM_THM_MOVW_ABS_NC ref_arg2
18: f2c0 0200 movt r2, #0
18: R_ARM_THM_MOVT_ABS ref_arg2
1c: f240 0100 movw r1, #0
1c: R_ARM_THM_MOVW_ABS_NC ref_arg1
20: f2c0 0100 movt r1, #0
20: R_ARM_THM_MOVT_ABS ref_arg1
24: 9400 str r4, [sp, #0]
26: f240 0000 movw r0, #0
26: R_ARM_THM_MOVW_ABS_NC ref_arg0
2a: f2c0 0000 movt r0, #0
2a: R_ARM_THM_MOVT_ABS ref_arg0
2e: f7ff fffe bl 0 <conv2d_floatarr_floatarr>
2e: R_ARM_THM_CALL aux_arr_conv2d
32: b002 add sp, #8
34: e8bd 4010 ldmia.w sp!, {r4, lr}
38: f7ff bffe b.w 0 <result_float_ref>
38: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <conv2d_floatarr_floatarr>:
0: b510 push {r4, lr}
2: 4c07 ldr r4, [pc, #28] @ (20 <conv2d_floatarr_floatarr+0x20>)
4: b082 sub sp, #8
6: 4b07 ldr r3, [pc, #28] @ (24 <conv2d_floatarr_floatarr+0x24>)
8: 4a07 ldr r2, [pc, #28] @ (28 <conv2d_floatarr_floatarr+0x28>)
a: 4908 ldr r1, [pc, #32] @ (2c <conv2d_floatarr_floatarr+0x2c>)
c: 4808 ldr r0, [pc, #32] @ (30 <conv2d_floatarr_floatarr+0x30>)
e: 9400 str r4, [sp, #0]
10: f7ff fffe bl 0 <conv2d_floatarr_floatarr>
10: R_ARM_THM_CALL aux_arr_conv2d
14: b002 add sp, #8
16: e8bd 4010 ldmia.w sp!, {r4, lr}
1a: f7ff bffe b.w 0 <result_float_ref>
1a: R_ARM_THM_JUMP24 result_float_ref
1e: bf00 nop
...
20: R_ARM_ABS32 ref_arg3
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg2
2c: R_ARM_ABS32 ref_arg1
30: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <conv2d_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00070713 mv a4,a4
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00068693 mv a3,a3
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_arg2
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: c606 sw ra,12(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_conv2d
30: 000080e7 jalr ra # 2c <conv2d_floatarr_floatarr+0x2c>
34: 40b2 lw ra,12(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <conv2d_floatarr_floatarr+0x38>
riscv64#
0000000000000000 <conv2d_floatarr_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000717 auipc a4,0x0
2: R_RISCV_PCREL_HI20 ref_arg3
6: 00070713 mv a4,a4
6: R_RISCV_PCREL_LO12_I .L0
a: 00000697 auipc a3,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00068693 mv a3,a3
e: R_RISCV_PCREL_LO12_I .L0
12: 00000617 auipc a2,0x0
12: R_RISCV_PCREL_HI20 ref_arg2
16: 00060613 mv a2,a2
16: R_RISCV_PCREL_LO12_I .L0
1a: 00000597 auipc a1,0x0
1a: R_RISCV_PCREL_HI20 ref_arg1
1e: 00058593 mv a1,a1
1e: R_RISCV_PCREL_LO12_I .L0
22: 00000517 auipc a0,0x0
22: R_RISCV_PCREL_HI20 ref_arg0
26: 00050513 mv a0,a0
26: R_RISCV_PCREL_LO12_I .L0
2a: e406 sd ra,8(sp)
2c: 00000097 auipc ra,0x0
2c: R_RISCV_CALL_PLT aux_arr_conv2d
30: 000080e7 jalr ra # 2c <conv2d_floatarr_floatarr+0x2c>
34: 60a2 ld ra,8(sp)
36: 0141 addi sp,sp,16
38: 00000317 auipc t1,0x0
38: R_RISCV_CALL_PLT result_float_ref
3c: 00030067 jr t1 # 38 <conv2d_floatarr_floatarr+0x38>
tricore#
00000000 <conv2d_floatarr_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg3
4: 20 08 sub.a %sp,8
6: d9 22 00 00 lea %a2,[%a2]0
6: R_TRICORE_LO2 ref_arg3
a: 91 00 00 70 movh.a %a7,0
a: R_TRICORE_HIADJ ref_out
e: 91 00 00 60 movh.a %a6,0
e: R_TRICORE_HIADJ ref_arg2
12: 91 00 00 50 movh.a %a5,0
12: R_TRICORE_HIADJ ref_arg1
16: 91 00 00 40 movh.a %a4,0
16: R_TRICORE_HIADJ ref_arg0
1a: f4 a2 st.a [%sp],%a2
1c: d9 77 00 00 lea %a7,[%a7]0 <0 <conv2d_floatarr_floatarr>>
1c: R_TRICORE_LO2 ref_out
20: d9 66 00 00 lea %a6,[%a6]0 <0 <conv2d_floatarr_floatarr>>
20: R_TRICORE_LO2 ref_arg2
24: d9 55 00 00 lea %a5,[%a5]0 <0 <conv2d_floatarr_floatarr>>
24: R_TRICORE_LO2 ref_arg1
28: d9 44 00 00 lea %a4,[%a4]0 <0 <conv2d_floatarr_floatarr>>
28: R_TRICORE_LO2 ref_arg0
2c: 6d 00 00 00 call 2c <conv2d_floatarr_floatarr+0x2c>
2c: R_TRICORE_24REL aux_arr_conv2d
30: d9 aa 08 00 lea %sp,[%sp]8
34: 1d 00 00 00 j 34 <conv2d_floatarr_floatarr+0x34>
34: R_TRICORE_24REL result_float_ref
x86#
00000000 <conv2d_floatarr_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg3
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg2
12: 68 00 00 00 00 push $0x0
13: R_386_32 ref_arg1
17: 68 00 00 00 00 push $0x0
18: R_386_32 ref_arg0
1c: e8 fc ff ff ff call 1d <conv2d_floatarr_floatarr+0x1d>
1d: R_386_PC32 aux_arr_conv2d
21: 83 c4 20 add $0x20,%esp
24: e9 fc ff ff ff jmp 25 <conv2d_floatarr_floatarr+0x25>
25: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <conv2d_floatarr_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 4c 8d 05 00 00 00 00 lea 0x0(%rip),%r8 # b <conv2d_floatarr_floatarr+0xb>
7: R_X86_64_PC32 ref_arg3-0x4
b: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 12 <conv2d_floatarr_floatarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # 19 <conv2d_floatarr_floatarr+0x19>
15: R_X86_64_PC32 ref_arg2-0x4
19: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 20 <conv2d_floatarr_floatarr+0x20>
1c: R_X86_64_PC32 ref_arg1-0x4
20: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 27 <conv2d_floatarr_floatarr+0x27>
23: R_X86_64_PC32 ref_arg0-0x4
27: e8 00 00 00 00 call 2c <conv2d_floatarr_floatarr+0x2c>
28: R_X86_64_PLT32 aux_arr_conv2d-0x4
2c: 48 83 c4 08 add $0x8,%rsp
30: e9 00 00 00 00 jmp 35 <.LC1+0x1>
31: R_X86_64_PLT32 result_float_ref-0x4
maxpool2d_floatarr#
STENCIL void maxpool2d_floatarr(void) {
// 2D max pooling of a float input [n, h, w] (batch and channels as n):
// largest element of each window, the padding is ignored. Parameters as int array [n, h, w, kh, kw, oh, ow, sh, sw, ph, pw]
// with the window size k, the output size o, the strides s and the padding p
aux_arr_maxpool2d(REF(ref_arg0), REF(ref_out), REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <maxpool2d_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000042 add x2, x2, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <maxpool2d_floatarr>
20: R_AARCH64_CALL26 aux_arr_maxpool2d
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <maxpool2d_floatarr>:
0: e92d4010 push {r4, lr}
4: e59f2010 ldr r2, [pc, #16] @ 1c <maxpool2d_floatarr+0x1c>
8: e59f1010 ldr r1, [pc, #16] @ 20 <maxpool2d_floatarr+0x20>
c: e59f0010 ldr r0, [pc, #16] @ 24 <maxpool2d_floatarr+0x24>
10: ebfffffe bl 0 <maxpool2d_floatarr>
10: R_ARM_CALL aux_arr_maxpool2d
14: e8bd4010 pop {r4, lr}
18: eafffffe b 0 <result_float_ref>
18: R_ARM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_out
24: R_ARM_ABS32 ref_arg0
armv7#
00000000 <maxpool2d_floatarr>:
0: e92d4010 push {r4, lr}
4: e3002000 movw r2, #0
4: R_ARM_MOVW_ABS_NC ref_arg1
8: e3402000 movt r2, #0
8: R_ARM_MOVT_ABS ref_arg1
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e3000000 movw r0, #0
14: R_ARM_MOVW_ABS_NC ref_arg0
18: e3400000 movt r0, #0
18: R_ARM_MOVT_ABS ref_arg0
1c: ebfffffe bl 0 <maxpool2d_floatarr>
1c: R_ARM_CALL aux_arr_maxpool2d
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <maxpool2d_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <maxpool2d_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <maxpool2d_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <maxpool2d_floatarr+0x1c>)
8: f7ff fffe bl 0 <maxpool2d_floatarr>
8: R_ARM_THM_CALL aux_arr_maxpool2d
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <maxpool2d_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <maxpool2d_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <maxpool2d_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <maxpool2d_floatarr+0x1c>)
8: f7ff fffe bl 0 <maxpool2d_floatarr>
8: R_ARM_THM_CALL aux_arr_maxpool2d
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <maxpool2d_floatarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: f7ff fffe bl 0 <maxpool2d_floatarr>
1a: R_ARM_THM_CALL aux_arr_maxpool2d
1e: e8bd 4008 ldmia.w sp!, {r3, lr}
22: f7ff bffe b.w 0 <result_float_ref>
22: R_ARM_THM_JUMP24 result_float_ref
26: bf00 nop
armv81mthumb#
00000000 <maxpool2d_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <maxpool2d_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <maxpool2d_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <maxpool2d_floatarr+0x1c>)
8: f7ff fffe bl 0 <maxpool2d_floatarr>
8: R_ARM_THM_CALL aux_arr_maxpool2d
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <maxpool2d_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_maxpool2d
20: 000080e7 jalr ra # 1c <maxpool2d_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <maxpool2d_floatarr+0x28>
riscv64#
0000000000000000 <maxpool2d_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_maxpool2d
20: 000080e7 jalr ra # 1c <maxpool2d_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <maxpool2d_floatarr+0x28>
tricore#
00000000 <maxpool2d_floatarr>:
0: 91 00 00 60 movh.a %a6,0
0: R_TRICORE_HIADJ ref_arg1
4: 91 00 00 50 movh.a %a5,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 66 00 00 lea %a6,[%a6]0 <0 <maxpool2d_floatarr>>
c: R_TRICORE_LO2 ref_arg1
10: d9 55 00 00 lea %a5,[%a5]0 <0 <maxpool2d_floatarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <maxpool2d_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <maxpool2d_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_maxpool2d
1c: 1d 00 00 00 j 1c <maxpool2d_floatarr+0x1c>
1c: R_TRICORE_24REL result_float_ref
x86#
00000000 <maxpool2d_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg1
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg0
12: e8 fc ff ff ff call 13 <maxpool2d_floatarr+0x13>
13: R_386_PC32 aux_arr_maxpool2d
17: 83 c4 18 add $0x18,%esp
1a: e9 fc ff ff ff jmp 1b <maxpool2d_floatarr+0x1b>
1b: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <maxpool2d_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # b <maxpool2d_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 12 <maxpool2d_floatarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 19 <maxpool2d_floatarr+0x19>
15: R_X86_64_PC32 ref_arg0-0x4
19: e8 00 00 00 00 call 1e <maxpool2d_floatarr+0x1e>
1a: R_X86_64_PLT32 aux_arr_maxpool2d-0x4
1e: 48 83 c4 08 add $0x8,%rsp
22: e9 00 00 00 00 jmp 27 <.LC11+0x3>
23: R_X86_64_PLT32 result_float_ref-0x4
avgpool2d_floatarr#
STENCIL void avgpool2d_floatarr(void) {
// 2D avg pooling of a float input [n, h, w] (batch and channels as n):
// mean of each window, the padding counts as zeros. Parameters as int array [n, h, w, kh, kw, oh, ow, sh, sw, ph, pw]
// with the window size k, the output size o, the strides s and the padding p
aux_arr_avgpool2d(REF(ref_arg0), REF(ref_out), REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <avgpool2d_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000042 add x2, x2, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <avgpool2d_floatarr>
20: R_AARCH64_CALL26 aux_arr_avgpool2d
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <avgpool2d_floatarr>:
0: e92d4010 push {r4, lr}
4: e59f2010 ldr r2, [pc, #16] @ 1c <avgpool2d_floatarr+0x1c>
8: e59f1010 ldr r1, [pc, #16] @ 20 <avgpool2d_floatarr+0x20>
c: e59f0010 ldr r0, [pc, #16] @ 24 <avgpool2d_floatarr+0x24>
10: ebfffffe bl 0 <avgpool2d_floatarr>
10: R_ARM_CALL aux_arr_avgpool2d
14: e8bd4010 pop {r4, lr}
18: eafffffe b 0 <result_float_ref>
18: R_ARM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_out
24: R_ARM_ABS32 ref_arg0
armv7#
00000000 <avgpool2d_floatarr>:
0: e92d4010 push {r4, lr}
4: e3002000 movw r2, #0
4: R_ARM_MOVW_ABS_NC ref_arg1
8: e3402000 movt r2, #0
8: R_ARM_MOVT_ABS ref_arg1
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e3000000 movw r0, #0
14: R_ARM_MOVW_ABS_NC ref_arg0
18: e3400000 movt r0, #0
18: R_ARM_MOVT_ABS ref_arg0
1c: ebfffffe bl 0 <avgpool2d_floatarr>
1c: R_ARM_CALL aux_arr_avgpool2d
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <avgpool2d_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <avgpool2d_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <avgpool2d_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <avgpool2d_floatarr+0x1c>)
8: f7ff fffe bl 0 <avgpool2d_floatarr>
8: R_ARM_THM_CALL aux_arr_avgpool2d
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <avgpool2d_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <avgpool2d_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <avgpool2d_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <avgpool2d_floatarr+0x1c>)
8: f7ff fffe bl 0 <avgpool2d_floatarr>
8: R_ARM_THM_CALL aux_arr_avgpool2d
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <avgpool2d_floatarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: f7ff fffe bl 0 <avgpool2d_floatarr>
1a: R_ARM_THM_CALL aux_arr_avgpool2d
1e: e8bd 4008 ldmia.w sp!, {r3, lr}
22: f7ff bffe b.w 0 <result_float_ref>
22: R_ARM_THM_JUMP24 result_float_ref
26: bf00 nop
armv81mthumb#
00000000 <avgpool2d_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <avgpool2d_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <avgpool2d_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <avgpool2d_floatarr+0x1c>)
8: f7ff fffe bl 0 <avgpool2d_floatarr>
8: R_ARM_THM_CALL aux_arr_avgpool2d
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <avgpool2d_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_avgpool2d
20: 000080e7 jalr ra # 1c <avgpool2d_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <avgpool2d_floatarr+0x28>
riscv64#
0000000000000000 <avgpool2d_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_avgpool2d
20: 000080e7 jalr ra # 1c <avgpool2d_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <avgpool2d_floatarr+0x28>
tricore#
00000000 <avgpool2d_floatarr>:
0: 91 00 00 60 movh.a %a6,0
0: R_TRICORE_HIADJ ref_arg1
4: 91 00 00 50 movh.a %a5,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 66 00 00 lea %a6,[%a6]0 <0 <avgpool2d_floatarr>>
c: R_TRICORE_LO2 ref_arg1
10: d9 55 00 00 lea %a5,[%a5]0 <0 <avgpool2d_floatarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <avgpool2d_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <avgpool2d_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_avgpool2d
1c: 1d 00 00 00 j 1c <avgpool2d_floatarr+0x1c>
1c: R_TRICORE_24REL result_float_ref
x86#
00000000 <avgpool2d_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg1
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg0
12: e8 fc ff ff ff call 13 <avgpool2d_floatarr+0x13>
13: R_386_PC32 aux_arr_avgpool2d
17: 83 c4 18 add $0x18,%esp
1a: e9 fc ff ff ff jmp 1b <avgpool2d_floatarr+0x1b>
1b: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <avgpool2d_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # b <avgpool2d_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 12 <avgpool2d_floatarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 19 <avgpool2d_floatarr+0x19>
15: R_X86_64_PC32 ref_arg0-0x4
19: e8 00 00 00 00 call 1e <avgpool2d_floatarr+0x1e>
1a: R_X86_64_PLT32 aux_arr_avgpool2d-0x4
1e: 48 83 c4 08 add $0x8,%rsp
22: e9 00 00 00 00 jmp 27 <.LC11+0x3>
23: R_X86_64_PLT32 result_float_ref-0x4
sum_intarr#
STENCIL void sum_intarr(void) {
// Sum of all elements of int array
*(int *)REF(ref_out) = aux_arr_sum_int(REF(ref_arg0), *(int *)REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <sum_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000000 adrp x0, 0 <ref_arg0>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000000 add x0, x0, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
18: 94000000 bl 0 <sum_intarr>
18: R_AARCH64_CALL26 aux_arr_sum_int
1c: 90000001 adrp x1, 0 <ref_out>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_out
20: a8c17bfd ldp x29, x30, [sp], #16
24: b9000020 str w0, [x1]
24: R_AARCH64_LDST32_ABS_LO12_NC ref_out
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <sum_intarr>:
0: e59f301c ldr r3, [pc, #28] @ 24 <sum_intarr+0x24>
4: e92d4010 push {r4, lr}
8: e5931000 ldr r1, [r3]
c: e59f0014 ldr r0, [pc, #20] @ 28 <sum_intarr+0x28>
10: ebfffffe bl 0 <sum_intarr>
10: R_ARM_CALL aux_arr_sum_int
14: e59f3010 ldr r3, [pc, #16] @ 2c <sum_intarr+0x2c>
18: e8bd4010 pop {r4, lr}
1c: e5830000 str r0, [r3]
20: eafffffe b 0 <result_int_ref>
20: R_ARM_JUMP24 result_int_ref
...
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7#
00000000 <sum_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3000000 movw r0, #0
c: R_ARM_MOVW_ABS_NC ref_arg0
10: e3400000 movt r0, #0
10: R_ARM_MOVT_ABS ref_arg0
14: e5931000 ldr r1, [r3]
18: ebfffffe bl 0 <sum_intarr>
18: R_ARM_CALL aux_arr_sum_int
1c: e3003000 movw r3, #0
1c: R_ARM_MOVW_ABS_NC ref_out
20: e3403000 movt r3, #0
20: R_ARM_MOVT_ABS ref_out
24: e8bd4010 pop {r4, lr}
28: e5830000 str r0, [r3]
2c: eafffffe b 0 <result_int_ref>
2c: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <sum_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sum_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <sum_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <sum_intarr>
8: R_ARM_THM_CALL aux_arr_sum_int
c: 4b04 ldr r3, [pc, #16] @ (20 <sum_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <sum_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sum_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <sum_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <sum_intarr>
8: R_ARM_THM_CALL aux_arr_sum_int
c: 4b04 ldr r3, [pc, #16] @ (20 <sum_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <sum_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0000 movw r0, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg0
e: f2c0 0000 movt r0, #0
e: R_ARM_THM_MOVT_ABS ref_arg0
12: 6819 ldr r1, [r3, #0]
14: f7ff fffe bl 0 <sum_intarr>
14: R_ARM_THM_CALL aux_arr_sum_int
18: f240 0300 movw r3, #0
18: R_ARM_THM_MOVW_ABS_NC ref_out
1c: f2c0 0300 movt r3, #0
1c: R_ARM_THM_MOVT_ABS ref_out
20: 6018 str r0, [r3, #0]
22: e8bd 4008 ldmia.w sp!, {r3, lr}
26: f7ff bffe b.w 0 <result_int_ref>
26: R_ARM_THM_JUMP24 result_int_ref
2a: bf00 nop
armv81mthumb#
00000000 <sum_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sum_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <sum_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <sum_intarr>
8: R_ARM_THM_CALL aux_arr_sum_int
c: 4b04 ldr r3, [pc, #16] @ (20 <sum_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
riscv32#
00000000 <sum_intarr>:
0: 00000597 auipc a1,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0005a583 lw a1,0(a1) # 0 <sum_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: c606 sw ra,12(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_sum_int
18: 000080e7 jalr ra # 14 <sum_intarr+0x14>
1c: 40b2 lw ra,12(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a023 sw a0,0(a5) # 1e <sum_intarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <sum_intarr+0x28>
riscv64#
0000000000000000 <sum_intarr>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 0005a583 lw a1,0(a1) # 2 <sum_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: e406 sd ra,8(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_sum_int
18: 000080e7 jalr ra # 14 <sum_intarr+0x14>
1c: 60a2 ld ra,8(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a023 sw a0,0(a5) # 1e <sum_intarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <sum_intarr+0x28>
tricore#
00000000 <sum_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <sum_intarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 44 00 00 lea %a4,[%a4]0 <0 <sum_intarr>>
c: R_TRICORE_LO2 ref_arg0
10: 6d 00 00 00 call 10 <sum_intarr+0x10>
10: R_TRICORE_24REL aux_arr_sum_int
14: 91 00 00 20 movh.a %a2,0
14: R_TRICORE_HIADJ ref_out
18: 59 22 00 00 st.w [%a2]0 <0 <sum_intarr>>,%d2
18: R_TRICORE_LO2 ref_out
1c: 1d 00 00 00 j 1c <sum_intarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <sum_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg0
e: e8 fc ff ff ff call f <sum_intarr+0xf>
f: R_386_PC32 aux_arr_sum_int
13: a3 00 00 00 00 mov %eax,0x0
14: R_386_32 ref_out
18: 83 c4 14 add $0x14,%esp
1b: e9 fc ff ff ff jmp 1c <sum_intarr+0x1c>
1c: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <sum_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <sum_intarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 30 mov (%rax),%esi
d: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 14 <sum_intarr+0x14>
10: R_X86_64_PC32 ref_arg0-0x4
14: e8 00 00 00 00 call 19 <sum_intarr+0x19>
15: R_X86_64_PLT32 aux_arr_sum_int-0x4
19: 4c 8d 0d 00 00 00 00 lea 0x0(%rip),%r9 # 20 <sum_intarr+0x20>
1c: R_X86_64_PC32 ref_out-0x4
20: 41 89 01 mov %eax,(%r9)
23: 48 83 c4 08 add $0x8,%rsp
27: e9 00 00 00 00 jmp 2c <.LC31>
28: R_X86_64_PLT32 result_int_ref-0x4
sumaxis_intarr#
STENCIL void sumaxis_intarr(void) {
// Sum along the middle axis of a row-major array [m, k, n], the dimensions
// are passed as int array. The result is an array [m, n].
aux_arr_sumaxis_int(REF(ref_arg0), REF(ref_out), REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <sumaxis_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000042 add x2, x2, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <sumaxis_intarr>
20: R_AARCH64_CALL26 aux_arr_sumaxis_int
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <sumaxis_intarr>:
0: e92d4010 push {r4, lr}
4: e59f2010 ldr r2, [pc, #16] @ 1c <sumaxis_intarr+0x1c>
8: e59f1010 ldr r1, [pc, #16] @ 20 <sumaxis_intarr+0x20>
c: e59f0010 ldr r0, [pc, #16] @ 24 <sumaxis_intarr+0x24>
10: ebfffffe bl 0 <sumaxis_intarr>
10: R_ARM_CALL aux_arr_sumaxis_int
14: e8bd4010 pop {r4, lr}
18: eafffffe b 0 <result_int_ref>
18: R_ARM_JUMP24 result_int_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_out
24: R_ARM_ABS32 ref_arg0
armv7#
00000000 <sumaxis_intarr>:
0: e92d4010 push {r4, lr}
4: e3002000 movw r2, #0
4: R_ARM_MOVW_ABS_NC ref_arg1
8: e3402000 movt r2, #0
8: R_ARM_MOVT_ABS ref_arg1
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e3000000 movw r0, #0
14: R_ARM_MOVW_ABS_NC ref_arg0
18: e3400000 movt r0, #0
18: R_ARM_MOVT_ABS ref_arg0
1c: ebfffffe bl 0 <sumaxis_intarr>
1c: R_ARM_CALL aux_arr_sumaxis_int
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_int_ref>
24: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <sumaxis_intarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <sumaxis_intarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <sumaxis_intarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <sumaxis_intarr+0x1c>)
8: f7ff fffe bl 0 <sumaxis_intarr>
8: R_ARM_THM_CALL aux_arr_sumaxis_int
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_int_ref>
10: R_ARM_THM_JUMP24 result_int_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <sumaxis_intarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <sumaxis_intarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <sumaxis_intarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <sumaxis_intarr+0x1c>)
8: f7ff fffe bl 0 <sumaxis_intarr>
8: R_ARM_THM_CALL aux_arr_sumaxis_int
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_int_ref>
10: R_ARM_THM_JUMP24 result_int_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <sumaxis_intarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: f7ff fffe bl 0 <sumaxis_intarr>
1a: R_ARM_THM_CALL aux_arr_sumaxis_int
1e: e8bd 4008 ldmia.w sp!, {r3, lr}
22: f7ff bffe b.w 0 <result_int_ref>
22: R_ARM_THM_JUMP24 result_int_ref
26: bf00 nop
armv81mthumb#
00000000 <sumaxis_intarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <sumaxis_intarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <sumaxis_intarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <sumaxis_intarr+0x1c>)
8: f7ff fffe bl 0 <sumaxis_intarr>
8: R_ARM_THM_CALL aux_arr_sumaxis_int
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_int_ref>
10: R_ARM_THM_JUMP24 result_int_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <sumaxis_intarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sumaxis_int
20: 000080e7 jalr ra # 1c <sumaxis_intarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <sumaxis_intarr+0x28>
riscv64#
0000000000000000 <sumaxis_intarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sumaxis_int
20: 000080e7 jalr ra # 1c <sumaxis_intarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <sumaxis_intarr+0x28>
tricore#
00000000 <sumaxis_intarr>:
0: 91 00 00 60 movh.a %a6,0
0: R_TRICORE_HIADJ ref_arg1
4: 91 00 00 50 movh.a %a5,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 66 00 00 lea %a6,[%a6]0 <0 <sumaxis_intarr>>
c: R_TRICORE_LO2 ref_arg1
10: d9 55 00 00 lea %a5,[%a5]0 <0 <sumaxis_intarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <sumaxis_intarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <sumaxis_intarr+0x18>
18: R_TRICORE_24REL aux_arr_sumaxis_int
1c: 1d 00 00 00 j 1c <sumaxis_intarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <sumaxis_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg1
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg0
12: e8 fc ff ff ff call 13 <sumaxis_intarr+0x13>
13: R_386_PC32 aux_arr_sumaxis_int
17: 83 c4 18 add $0x18,%esp
1a: e9 fc ff ff ff jmp 1b <sumaxis_intarr+0x1b>
1b: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <sumaxis_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # b <sumaxis_intarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 12 <sumaxis_intarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 19 <sumaxis_intarr+0x19>
15: R_X86_64_PC32 ref_arg0-0x4
19: e8 00 00 00 00 call 1e <sumaxis_intarr+0x1e>
1a: R_X86_64_PLT32 aux_arr_sumaxis_int-0x4
1e: 48 83 c4 08 add $0x8,%rsp
22: e9 00 00 00 00 jmp 27 <.LC11+0x3>
23: R_X86_64_PLT32 result_int_ref-0x4
min_intarr#
STENCIL void min_intarr(void) {
// Smallest element of int array
*(int *)REF(ref_out) = aux_arr_min_int(REF(ref_arg0), *(int *)REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <min_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000000 adrp x0, 0 <ref_arg0>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000000 add x0, x0, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
18: 94000000 bl 0 <min_intarr>
18: R_AARCH64_CALL26 aux_arr_min_int
1c: 90000001 adrp x1, 0 <ref_out>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_out
20: a8c17bfd ldp x29, x30, [sp], #16
24: b9000020 str w0, [x1]
24: R_AARCH64_LDST32_ABS_LO12_NC ref_out
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <min_intarr>:
0: e59f301c ldr r3, [pc, #28] @ 24 <min_intarr+0x24>
4: e92d4010 push {r4, lr}
8: e5931000 ldr r1, [r3]
c: e59f0014 ldr r0, [pc, #20] @ 28 <min_intarr+0x28>
10: ebfffffe bl 0 <min_intarr>
10: R_ARM_CALL aux_arr_min_int
14: e59f3010 ldr r3, [pc, #16] @ 2c <min_intarr+0x2c>
18: e8bd4010 pop {r4, lr}
1c: e5830000 str r0, [r3]
20: eafffffe b 0 <result_int_ref>
20: R_ARM_JUMP24 result_int_ref
...
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7#
00000000 <min_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3000000 movw r0, #0
c: R_ARM_MOVW_ABS_NC ref_arg0
10: e3400000 movt r0, #0
10: R_ARM_MOVT_ABS ref_arg0
14: e5931000 ldr r1, [r3]
18: ebfffffe bl 0 <min_intarr>
18: R_ARM_CALL aux_arr_min_int
1c: e3003000 movw r3, #0
1c: R_ARM_MOVW_ABS_NC ref_out
20: e3403000 movt r3, #0
20: R_ARM_MOVT_ABS ref_out
24: e8bd4010 pop {r4, lr}
28: e5830000 str r0, [r3]
2c: eafffffe b 0 <result_int_ref>
2c: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <min_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <min_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <min_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <min_intarr>
8: R_ARM_THM_CALL aux_arr_min_int
c: 4b04 ldr r3, [pc, #16] @ (20 <min_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <min_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <min_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <min_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <min_intarr>
8: R_ARM_THM_CALL aux_arr_min_int
c: 4b04 ldr r3, [pc, #16] @ (20 <min_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <min_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0000 movw r0, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg0
e: f2c0 0000 movt r0, #0
e: R_ARM_THM_MOVT_ABS ref_arg0
12: 6819 ldr r1, [r3, #0]
14: f7ff fffe bl 0 <min_intarr>
14: R_ARM_THM_CALL aux_arr_min_int
18: f240 0300 movw r3, #0
18: R_ARM_THM_MOVW_ABS_NC ref_out
1c: f2c0 0300 movt r3, #0
1c: R_ARM_THM_MOVT_ABS ref_out
20: 6018 str r0, [r3, #0]
22: e8bd 4008 ldmia.w sp!, {r3, lr}
26: f7ff bffe b.w 0 <result_int_ref>
26: R_ARM_THM_JUMP24 result_int_ref
2a: bf00 nop
armv81mthumb#
00000000 <min_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <min_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <min_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <min_intarr>
8: R_ARM_THM_CALL aux_arr_min_int
c: 4b04 ldr r3, [pc, #16] @ (20 <min_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
riscv32#
00000000 <min_intarr>:
0: 00000597 auipc a1,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0005a583 lw a1,0(a1) # 0 <min_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: c606 sw ra,12(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_min_int
18: 000080e7 jalr ra # 14 <min_intarr+0x14>
1c: 40b2 lw ra,12(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a023 sw a0,0(a5) # 1e <min_intarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <min_intarr+0x28>
riscv64#
0000000000000000 <min_intarr>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 0005a583 lw a1,0(a1) # 2 <min_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: e406 sd ra,8(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_min_int
18: 000080e7 jalr ra # 14 <min_intarr+0x14>
1c: 60a2 ld ra,8(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a023 sw a0,0(a5) # 1e <min_intarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <min_intarr+0x28>
tricore#
00000000 <min_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <min_intarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 44 00 00 lea %a4,[%a4]0 <0 <min_intarr>>
c: R_TRICORE_LO2 ref_arg0
10: 6d 00 00 00 call 10 <min_intarr+0x10>
10: R_TRICORE_24REL aux_arr_min_int
14: 91 00 00 20 movh.a %a2,0
14: R_TRICORE_HIADJ ref_out
18: 59 22 00 00 st.w [%a2]0 <0 <min_intarr>>,%d2
18: R_TRICORE_LO2 ref_out
1c: 1d 00 00 00 j 1c <min_intarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <min_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg0
e: e8 fc ff ff ff call f <min_intarr+0xf>
f: R_386_PC32 aux_arr_min_int
13: a3 00 00 00 00 mov %eax,0x0
14: R_386_32 ref_out
18: 83 c4 14 add $0x14,%esp
1b: e9 fc ff ff ff jmp 1c <min_intarr+0x1c>
1c: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <min_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <min_intarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 30 mov (%rax),%esi
d: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 14 <min_intarr+0x14>
10: R_X86_64_PC32 ref_arg0-0x4
14: e8 00 00 00 00 call 19 <min_intarr+0x19>
15: R_X86_64_PLT32 aux_arr_min_int-0x4
19: 4c 8d 15 00 00 00 00 lea 0x0(%rip),%r10 # 20 <min_intarr+0x20>
1c: R_X86_64_PC32 ref_out-0x4
20: 41 89 02 mov %eax,(%r10)
23: 48 83 c4 08 add $0x8,%rsp
27: e9 00 00 00 00 jmp 2c <.LC31>
28: R_X86_64_PLT32 result_int_ref-0x4
max_intarr#
STENCIL void max_intarr(void) {
// Largest element of int array
*(int *)REF(ref_out) = aux_arr_max_int(REF(ref_arg0), *(int *)REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <max_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000000 adrp x0, 0 <ref_arg0>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000000 add x0, x0, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
18: 94000000 bl 0 <max_intarr>
18: R_AARCH64_CALL26 aux_arr_max_int
1c: 90000001 adrp x1, 0 <ref_out>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_out
20: a8c17bfd ldp x29, x30, [sp], #16
24: b9000020 str w0, [x1]
24: R_AARCH64_LDST32_ABS_LO12_NC ref_out
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <max_intarr>:
0: e59f301c ldr r3, [pc, #28] @ 24 <max_intarr+0x24>
4: e92d4010 push {r4, lr}
8: e5931000 ldr r1, [r3]
c: e59f0014 ldr r0, [pc, #20] @ 28 <max_intarr+0x28>
10: ebfffffe bl 0 <max_intarr>
10: R_ARM_CALL aux_arr_max_int
14: e59f3010 ldr r3, [pc, #16] @ 2c <max_intarr+0x2c>
18: e8bd4010 pop {r4, lr}
1c: e5830000 str r0, [r3]
20: eafffffe b 0 <result_int_ref>
20: R_ARM_JUMP24 result_int_ref
...
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7#
00000000 <max_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3000000 movw r0, #0
c: R_ARM_MOVW_ABS_NC ref_arg0
10: e3400000 movt r0, #0
10: R_ARM_MOVT_ABS ref_arg0
14: e5931000 ldr r1, [r3]
18: ebfffffe bl 0 <max_intarr>
18: R_ARM_CALL aux_arr_max_int
1c: e3003000 movw r3, #0
1c: R_ARM_MOVW_ABS_NC ref_out
20: e3403000 movt r3, #0
20: R_ARM_MOVT_ABS ref_out
24: e8bd4010 pop {r4, lr}
28: e5830000 str r0, [r3]
2c: eafffffe b 0 <result_int_ref>
2c: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <max_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <max_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <max_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <max_intarr>
8: R_ARM_THM_CALL aux_arr_max_int
c: 4b04 ldr r3, [pc, #16] @ (20 <max_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <max_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <max_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <max_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <max_intarr>
8: R_ARM_THM_CALL aux_arr_max_int
c: 4b04 ldr r3, [pc, #16] @ (20 <max_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <max_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0000 movw r0, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg0
e: f2c0 0000 movt r0, #0
e: R_ARM_THM_MOVT_ABS ref_arg0
12: 6819 ldr r1, [r3, #0]
14: f7ff fffe bl 0 <max_intarr>
14: R_ARM_THM_CALL aux_arr_max_int
18: f240 0300 movw r3, #0
18: R_ARM_THM_MOVW_ABS_NC ref_out
1c: f2c0 0300 movt r3, #0
1c: R_ARM_THM_MOVT_ABS ref_out
20: 6018 str r0, [r3, #0]
22: e8bd 4008 ldmia.w sp!, {r3, lr}
26: f7ff bffe b.w 0 <result_int_ref>
26: R_ARM_THM_JUMP24 result_int_ref
2a: bf00 nop
armv81mthumb#
00000000 <max_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <max_intarr+0x18>)
4: 4805 ldr r0, [pc, #20] @ (1c <max_intarr+0x1c>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <max_intarr>
8: R_ARM_THM_CALL aux_arr_max_int
c: 4b04 ldr r3, [pc, #16] @ (20 <max_intarr+0x20>)
e: 6018 str r0, [r3, #0]
10: e8bd 4008 ldmia.w sp!, {r3, lr}
14: f7ff bffe b.w 0 <result_int_ref>
14: R_ARM_THM_JUMP24 result_int_ref
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_arg0
20: R_ARM_ABS32 ref_out
riscv32#
00000000 <max_intarr>:
0: 00000597 auipc a1,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0005a583 lw a1,0(a1) # 0 <max_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: c606 sw ra,12(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_max_int
18: 000080e7 jalr ra # 14 <max_intarr+0x14>
1c: 40b2 lw ra,12(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a023 sw a0,0(a5) # 1e <max_intarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <max_intarr+0x28>
riscv64#
0000000000000000 <max_intarr>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 0005a583 lw a1,0(a1) # 2 <max_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: e406 sd ra,8(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_max_int
18: 000080e7 jalr ra # 14 <max_intarr+0x14>
1c: 60a2 ld ra,8(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a023 sw a0,0(a5) # 1e <max_intarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <max_intarr+0x28>
tricore#
00000000 <max_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <max_intarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 44 00 00 lea %a4,[%a4]0 <0 <max_intarr>>
c: R_TRICORE_LO2 ref_arg0
10: 6d 00 00 00 call 10 <max_intarr+0x10>
10: R_TRICORE_24REL aux_arr_max_int
14: 91 00 00 20 movh.a %a2,0
14: R_TRICORE_HIADJ ref_out
18: 59 22 00 00 st.w [%a2]0 <0 <max_intarr>>,%d2
18: R_TRICORE_LO2 ref_out
1c: 1d 00 00 00 j 1c <max_intarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <max_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg0
e: e8 fc ff ff ff call f <max_intarr+0xf>
f: R_386_PC32 aux_arr_max_int
13: a3 00 00 00 00 mov %eax,0x0
14: R_386_32 ref_out
18: 83 c4 14 add $0x14,%esp
1b: e9 fc ff ff ff jmp 1c <max_intarr+0x1c>
1c: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <max_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <max_intarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 30 mov (%rax),%esi
d: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 14 <max_intarr+0x14>
10: R_X86_64_PC32 ref_arg0-0x4
14: e8 00 00 00 00 call 19 <max_intarr+0x19>
15: R_X86_64_PLT32 aux_arr_max_int-0x4
19: 4c 8d 15 00 00 00 00 lea 0x0(%rip),%r10 # 20 <max_intarr+0x20>
1c: R_X86_64_PC32 ref_out-0x4
20: 41 89 02 mov %eax,(%r10)
23: 48 83 c4 08 add $0x8,%rsp
27: e9 00 00 00 00 jmp 2c <.LC31>
28: R_X86_64_PLT32 result_int_ref-0x4
sort_intarr#
STENCIL void sort_intarr(void) {
// Sorted copy of int array
aux_arr_sort_int(REF(ref_arg0), REF(ref_out), *(int *)REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <sort_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <sort_intarr>
20: R_AARCH64_CALL26 aux_arr_sort_int
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <sort_intarr>:
0: e59f3018 ldr r3, [pc, #24] @ 20 <sort_intarr+0x20>
4: e92d4010 push {r4, lr}
8: e59f1014 ldr r1, [pc, #20] @ 24 <sort_intarr+0x24>
c: e59f0014 ldr r0, [pc, #20] @ 28 <sort_intarr+0x28>
10: e5932000 ldr r2, [r3]
14: ebfffffe bl 0 <sort_intarr>
14: R_ARM_CALL aux_arr_sort_int
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_int_ref>
1c: R_ARM_JUMP24 result_int_ref
...
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg0
armv7#
00000000 <sort_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <sort_intarr>
20: R_ARM_CALL aux_arr_sort_int
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_int_ref>
28: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <sort_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sort_intarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <sort_intarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <sort_intarr+0x20>)
a: f7ff fffe bl 0 <sort_intarr>
a: R_ARM_THM_CALL aux_arr_sort_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <sort_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sort_intarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <sort_intarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <sort_intarr+0x20>)
a: f7ff fffe bl 0 <sort_intarr>
a: R_ARM_THM_CALL aux_arr_sort_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <sort_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <sort_intarr>
1c: R_ARM_THM_CALL aux_arr_sort_int
20: e8bd 4008 ldmia.w sp!, {r3, lr}
24: f7ff bffe b.w 0 <result_int_ref>
24: R_ARM_THM_JUMP24 result_int_ref
armv81mthumb#
00000000 <sort_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sort_intarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <sort_intarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <sort_intarr+0x20>)
a: f7ff fffe bl 0 <sort_intarr>
a: R_ARM_THM_CALL aux_arr_sort_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <sort_intarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 00062603 lw a2,0(a2) # 0 <sort_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sort_int
20: 000080e7 jalr ra # 1c <sort_intarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <sort_intarr+0x28>
riscv64#
0000000000000000 <sort_intarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00062603 lw a2,0(a2) # 2 <sort_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sort_int
20: 000080e7 jalr ra # 1c <sort_intarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <sort_intarr+0x28>
tricore#
00000000 <sort_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <sort_intarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_out
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <sort_intarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <sort_intarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <sort_intarr+0x18>
18: R_TRICORE_24REL aux_arr_sort_int
1c: 1d 00 00 00 j 1c <sort_intarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <sort_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_out
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <sort_intarr+0x14>
14: R_386_PC32 aux_arr_sort_int
18: 83 c4 18 add $0x18,%esp
1b: e9 fc ff ff ff jmp 1c <sort_intarr+0x1c>
1c: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <sort_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <sort_intarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 10 mov (%rax),%edx
d: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 14 <sort_intarr+0x14>
10: R_X86_64_PC32 ref_out-0x4
14: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1b <sort_intarr+0x1b>
17: R_X86_64_PC32 ref_arg0-0x4
1b: e8 00 00 00 00 call 20 <sort_intarr+0x20>
1c: R_X86_64_PLT32 aux_arr_sort_int-0x4
20: 48 83 c4 08 add $0x8,%rsp
24: e9 00 00 00 00 jmp 29 <.LC1+0x1>
25: R_X86_64_PLT32 result_int_ref-0x4
argsort_intarr#
STENCIL void argsort_intarr(void) {
// Indices that sort a int array
aux_arr_argsort_int(REF(ref_arg0), REF(ref_out), *(int *)REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <argsort_intarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <argsort_intarr>
20: R_AARCH64_CALL26 aux_arr_argsort_int
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <argsort_intarr>:
0: e59f3018 ldr r3, [pc, #24] @ 20 <argsort_intarr+0x20>
4: e92d4010 push {r4, lr}
8: e59f1014 ldr r1, [pc, #20] @ 24 <argsort_intarr+0x24>
c: e59f0014 ldr r0, [pc, #20] @ 28 <argsort_intarr+0x28>
10: e5932000 ldr r2, [r3]
14: ebfffffe bl 0 <argsort_intarr>
14: R_ARM_CALL aux_arr_argsort_int
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_int_ref>
1c: R_ARM_JUMP24 result_int_ref
...
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg0
armv7#
00000000 <argsort_intarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <argsort_intarr>
20: R_ARM_CALL aux_arr_argsort_int
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_int_ref>
28: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <argsort_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <argsort_intarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <argsort_intarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <argsort_intarr+0x20>)
a: f7ff fffe bl 0 <argsort_intarr>
a: R_ARM_THM_CALL aux_arr_argsort_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <argsort_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <argsort_intarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <argsort_intarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <argsort_intarr+0x20>)
a: f7ff fffe bl 0 <argsort_intarr>
a: R_ARM_THM_CALL aux_arr_argsort_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <argsort_intarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <argsort_intarr>
1c: R_ARM_THM_CALL aux_arr_argsort_int
20: e8bd 4008 ldmia.w sp!, {r3, lr}
24: f7ff bffe b.w 0 <result_int_ref>
24: R_ARM_THM_JUMP24 result_int_ref
armv81mthumb#
00000000 <argsort_intarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <argsort_intarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <argsort_intarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <argsort_intarr+0x20>)
a: f7ff fffe bl 0 <argsort_intarr>
a: R_ARM_THM_CALL aux_arr_argsort_int
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <argsort_intarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 00062603 lw a2,0(a2) # 0 <argsort_intarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_argsort_int
20: 000080e7 jalr ra # 1c <argsort_intarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <argsort_intarr+0x28>
riscv64#
0000000000000000 <argsort_intarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00062603 lw a2,0(a2) # 2 <argsort_intarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_argsort_int
20: 000080e7 jalr ra # 1c <argsort_intarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <argsort_intarr+0x28>
tricore#
00000000 <argsort_intarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <argsort_intarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_out
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <argsort_intarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <argsort_intarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <argsort_intarr+0x18>
18: R_TRICORE_24REL aux_arr_argsort_int
1c: 1d 00 00 00 j 1c <argsort_intarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <argsort_intarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_out
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <argsort_intarr+0x14>
14: R_386_PC32 aux_arr_argsort_int
18: 83 c4 18 add $0x18,%esp
1b: e9 fc ff ff ff jmp 1c <argsort_intarr+0x1c>
1c: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <argsort_intarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <argsort_intarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 10 mov (%rax),%edx
d: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 14 <argsort_intarr+0x14>
10: R_X86_64_PC32 ref_out-0x4
14: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1b <argsort_intarr+0x1b>
17: R_X86_64_PC32 ref_arg0-0x4
1b: e8 00 00 00 00 call 20 <argsort_intarr+0x20>
1c: R_X86_64_PLT32 aux_arr_argsort_int-0x4
20: 48 83 c4 08 add $0x8,%rsp
24: e9 00 00 00 00 jmp 29 <.LC1+0x1>
25: R_X86_64_PLT32 result_int_ref-0x4
sum_floatarr#
STENCIL void sum_floatarr(void) {
// Sum of all elements of float array
*(float *)REF(ref_out) = aux_arr_sum_float(REF(ref_arg0), *(int *)REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <sum_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000000 adrp x0, 0 <ref_arg0>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000000 add x0, x0, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
18: 94000000 bl 0 <sum_floatarr>
18: R_AARCH64_CALL26 aux_arr_sum_float
1c: 90000000 adrp x0, 0 <ref_out>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_out
20: a8c17bfd ldp x29, x30, [sp], #16
24: bd000000 str s0, [x0]
24: R_AARCH64_LDST32_ABS_LO12_NC ref_out
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <sum_floatarr>:
0: e59f301c ldr r3, [pc, #28] @ 24 <sum_floatarr+0x24>
4: e92d4010 push {r4, lr}
8: e5931000 ldr r1, [r3]
c: e59f0014 ldr r0, [pc, #20] @ 28 <sum_floatarr+0x28>
10: ebfffffe bl 0 <sum_floatarr>
10: R_ARM_CALL aux_arr_sum_float
14: e59f3010 ldr r3, [pc, #16] @ 2c <sum_floatarr+0x2c>
18: e8bd4010 pop {r4, lr}
1c: ed830a00 vstr s0, [r3]
20: eafffffe b 0 <result_float_ref>
20: R_ARM_JUMP24 result_float_ref
...
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7#
00000000 <sum_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3000000 movw r0, #0
c: R_ARM_MOVW_ABS_NC ref_arg0
10: e3400000 movt r0, #0
10: R_ARM_MOVT_ABS ref_arg0
14: e5931000 ldr r1, [r3]
18: ebfffffe bl 0 <sum_floatarr>
18: R_ARM_CALL aux_arr_sum_float
1c: e3003000 movw r3, #0
1c: R_ARM_MOVW_ABS_NC ref_out
20: e3403000 movt r3, #0
20: R_ARM_MOVT_ABS ref_out
24: e8bd4010 pop {r4, lr}
28: ed830a00 vstr s0, [r3]
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <sum_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <sum_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <sum_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <sum_floatarr>
8: R_ARM_THM_CALL aux_arr_sum_float
c: 4b05 ldr r3, [pc, #20] @ (24 <sum_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <sum_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <sum_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <sum_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <sum_floatarr>
8: R_ARM_THM_CALL aux_arr_sum_float
c: 4b05 ldr r3, [pc, #20] @ (24 <sum_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <sum_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0000 movw r0, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg0
e: f2c0 0000 movt r0, #0
e: R_ARM_THM_MOVT_ABS ref_arg0
12: 6819 ldr r1, [r3, #0]
14: f7ff fffe bl 0 <sum_floatarr>
14: R_ARM_THM_CALL aux_arr_sum_float
18: f240 0300 movw r3, #0
18: R_ARM_THM_MOVW_ABS_NC ref_out
1c: f2c0 0300 movt r3, #0
1c: R_ARM_THM_MOVT_ABS ref_out
20: ed83 0a00 vstr s0, [r3]
24: e8bd 4008 ldmia.w sp!, {r3, lr}
28: f7ff bffe b.w 0 <result_float_ref>
28: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <sum_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <sum_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <sum_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <sum_floatarr>
8: R_ARM_THM_CALL aux_arr_sum_float
c: 4b05 ldr r3, [pc, #20] @ (24 <sum_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
riscv32#
00000000 <sum_floatarr>:
0: 00000597 auipc a1,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0005a583 lw a1,0(a1) # 0 <sum_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: c606 sw ra,12(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_sum_float
18: 000080e7 jalr ra # 14 <sum_floatarr+0x14>
1c: 40b2 lw ra,12(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00078793 mv a5,a5
22: R_RISCV_PCREL_LO12_I .L0
26: e388 fsw fa0,0(a5)
28: 0141 addi sp,sp,16
2a: 00000317 auipc t1,0x0
2a: R_RISCV_CALL_PLT result_float_ref
2e: 00030067 jr t1 # 2a <sum_floatarr+0x2a>
riscv64#
0000000000000000 <sum_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 0005a583 lw a1,0(a1) # 2 <sum_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: e406 sd ra,8(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_sum_float
18: 000080e7 jalr ra # 14 <sum_floatarr+0x14>
1c: 60a2 ld ra,8(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a027 fsw fa0,0(a5) # 1e <sum_floatarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <sum_floatarr+0x28>
tricore#
00000000 <sum_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <sum_floatarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 44 00 00 lea %a4,[%a4]0 <0 <sum_floatarr>>
c: R_TRICORE_LO2 ref_arg0
10: 6d 00 00 00 call 10 <sum_floatarr+0x10>
10: R_TRICORE_24REL aux_arr_sum_float
14: 91 00 00 20 movh.a %a2,0
14: R_TRICORE_HIADJ ref_out
18: d9 22 00 00 lea %a2,[%a2]0 <0 <sum_floatarr>>
18: R_TRICORE_LO2 ref_out
1c: 74 22 st.w [%a2],%d2
1e: 1d 00 00 00 j 1e <sum_floatarr+0x1e>
1e: R_TRICORE_24REL result_float_ref
x86#
00000000 <sum_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg0
e: e8 fc ff ff ff call f <sum_floatarr+0xf>
f: R_386_PC32 aux_arr_sum_float
13: d9 1d 00 00 00 00 fstps 0x0
15: R_386_32 ref_out
19: 83 c4 14 add $0x14,%esp
1c: e9 fc ff ff ff jmp 1d <sum_floatarr+0x1d>
1d: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <sum_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <sum_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 30 mov (%rax),%esi
d: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 14 <sum_floatarr+0x14>
10: R_X86_64_PC32 ref_arg0-0x4
14: e8 00 00 00 00 call 19 <sum_floatarr+0x19>
15: R_X86_64_PLT32 aux_arr_sum_float-0x4
19: 4c 8d 0d 00 00 00 00 lea 0x0(%rip),%r9 # 20 <sum_floatarr+0x20>
1c: R_X86_64_PC32 ref_out-0x4
20: f3 41 0f 11 01 movss %xmm0,(%r9)
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
sumaxis_floatarr#
STENCIL void sumaxis_floatarr(void) {
// Sum along the middle axis of a row-major array [m, k, n], the dimensions
// are passed as int array. The result is an array [m, n].
aux_arr_sumaxis_float(REF(ref_arg0), REF(ref_out), REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <sumaxis_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: 91000042 add x2, x2, #0x0
10: R_AARCH64_ADD_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <sumaxis_floatarr>
20: R_AARCH64_CALL26 aux_arr_sumaxis_float
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <sumaxis_floatarr>:
0: e92d4010 push {r4, lr}
4: e59f2010 ldr r2, [pc, #16] @ 1c <sumaxis_floatarr+0x1c>
8: e59f1010 ldr r1, [pc, #16] @ 20 <sumaxis_floatarr+0x20>
c: e59f0010 ldr r0, [pc, #16] @ 24 <sumaxis_floatarr+0x24>
10: ebfffffe bl 0 <sumaxis_floatarr>
10: R_ARM_CALL aux_arr_sumaxis_float
14: e8bd4010 pop {r4, lr}
18: eafffffe b 0 <result_float_ref>
18: R_ARM_JUMP24 result_float_ref
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_out
24: R_ARM_ABS32 ref_arg0
armv7#
00000000 <sumaxis_floatarr>:
0: e92d4010 push {r4, lr}
4: e3002000 movw r2, #0
4: R_ARM_MOVW_ABS_NC ref_arg1
8: e3402000 movt r2, #0
8: R_ARM_MOVT_ABS ref_arg1
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e3000000 movw r0, #0
14: R_ARM_MOVW_ABS_NC ref_arg0
18: e3400000 movt r0, #0
18: R_ARM_MOVT_ABS ref_arg0
1c: ebfffffe bl 0 <sumaxis_floatarr>
1c: R_ARM_CALL aux_arr_sumaxis_float
20: e8bd4010 pop {r4, lr}
24: eafffffe b 0 <result_float_ref>
24: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <sumaxis_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <sumaxis_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <sumaxis_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <sumaxis_floatarr+0x1c>)
8: f7ff fffe bl 0 <sumaxis_floatarr>
8: R_ARM_THM_CALL aux_arr_sumaxis_float
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <sumaxis_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <sumaxis_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <sumaxis_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <sumaxis_floatarr+0x1c>)
8: f7ff fffe bl 0 <sumaxis_floatarr>
8: R_ARM_THM_CALL aux_arr_sumaxis_float
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <sumaxis_floatarr>:
0: b508 push {r3, lr}
2: f240 0200 movw r2, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0200 movt r2, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: f7ff fffe bl 0 <sumaxis_floatarr>
1a: R_ARM_THM_CALL aux_arr_sumaxis_float
1e: e8bd 4008 ldmia.w sp!, {r3, lr}
22: f7ff bffe b.w 0 <result_float_ref>
22: R_ARM_THM_JUMP24 result_float_ref
26: bf00 nop
armv81mthumb#
00000000 <sumaxis_floatarr>:
0: b508 push {r3, lr}
2: 4a04 ldr r2, [pc, #16] @ (14 <sumaxis_floatarr+0x14>)
4: 4904 ldr r1, [pc, #16] @ (18 <sumaxis_floatarr+0x18>)
6: 4805 ldr r0, [pc, #20] @ (1c <sumaxis_floatarr+0x1c>)
8: f7ff fffe bl 0 <sumaxis_floatarr>
8: R_ARM_THM_CALL aux_arr_sumaxis_float
c: e8bd 4008 ldmia.w sp!, {r3, lr}
10: f7ff bffe b.w 0 <result_float_ref>
10: R_ARM_THM_JUMP24 result_float_ref
...
14: R_ARM_ABS32 ref_arg1
18: R_ARM_ABS32 ref_out
1c: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <sumaxis_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sumaxis_float
20: 000080e7 jalr ra # 1c <sumaxis_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <sumaxis_floatarr+0x28>
riscv64#
0000000000000000 <sumaxis_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00060613 mv a2,a2
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sumaxis_float
20: 000080e7 jalr ra # 1c <sumaxis_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <sumaxis_floatarr+0x28>
tricore#
00000000 <sumaxis_floatarr>:
0: 91 00 00 60 movh.a %a6,0
0: R_TRICORE_HIADJ ref_arg1
4: 91 00 00 50 movh.a %a5,0
4: R_TRICORE_HIADJ ref_out
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 66 00 00 lea %a6,[%a6]0 <0 <sumaxis_floatarr>>
c: R_TRICORE_LO2 ref_arg1
10: d9 55 00 00 lea %a5,[%a5]0 <0 <sumaxis_floatarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <sumaxis_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <sumaxis_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_sumaxis_float
1c: 1d 00 00 00 j 1c <sumaxis_floatarr+0x1c>
1c: R_TRICORE_24REL result_float_ref
x86#
00000000 <sumaxis_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: 68 00 00 00 00 push $0x0
4: R_386_32 ref_arg1
8: 68 00 00 00 00 push $0x0
9: R_386_32 ref_out
d: 68 00 00 00 00 push $0x0
e: R_386_32 ref_arg0
12: e8 fc ff ff ff call 13 <sumaxis_floatarr+0x13>
13: R_386_PC32 aux_arr_sumaxis_float
17: 83 c4 18 add $0x18,%esp
1a: e9 fc ff ff ff jmp 1b <sumaxis_floatarr+0x1b>
1b: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <sumaxis_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 15 00 00 00 00 lea 0x0(%rip),%rdx # b <sumaxis_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 12 <sumaxis_floatarr+0x12>
e: R_X86_64_PC32 ref_out-0x4
12: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 19 <sumaxis_floatarr+0x19>
15: R_X86_64_PC32 ref_arg0-0x4
19: e8 00 00 00 00 call 1e <sumaxis_floatarr+0x1e>
1a: R_X86_64_PLT32 aux_arr_sumaxis_float-0x4
1e: 48 83 c4 08 add $0x8,%rsp
22: e9 00 00 00 00 jmp 27 <.LC11+0x3>
23: R_X86_64_PLT32 result_float_ref-0x4
min_floatarr#
STENCIL void min_floatarr(void) {
// Smallest element of float array
*(float *)REF(ref_out) = aux_arr_min_float(REF(ref_arg0), *(int *)REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <min_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000000 adrp x0, 0 <ref_arg0>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000000 add x0, x0, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
18: 94000000 bl 0 <min_floatarr>
18: R_AARCH64_CALL26 aux_arr_min_float
1c: 90000000 adrp x0, 0 <ref_out>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_out
20: a8c17bfd ldp x29, x30, [sp], #16
24: bd000000 str s0, [x0]
24: R_AARCH64_LDST32_ABS_LO12_NC ref_out
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <min_floatarr>:
0: e59f301c ldr r3, [pc, #28] @ 24 <min_floatarr+0x24>
4: e92d4010 push {r4, lr}
8: e5931000 ldr r1, [r3]
c: e59f0014 ldr r0, [pc, #20] @ 28 <min_floatarr+0x28>
10: ebfffffe bl 0 <min_floatarr>
10: R_ARM_CALL aux_arr_min_float
14: e59f3010 ldr r3, [pc, #16] @ 2c <min_floatarr+0x2c>
18: e8bd4010 pop {r4, lr}
1c: ed830a00 vstr s0, [r3]
20: eafffffe b 0 <result_float_ref>
20: R_ARM_JUMP24 result_float_ref
...
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7#
00000000 <min_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3000000 movw r0, #0
c: R_ARM_MOVW_ABS_NC ref_arg0
10: e3400000 movt r0, #0
10: R_ARM_MOVT_ABS ref_arg0
14: e5931000 ldr r1, [r3]
18: ebfffffe bl 0 <min_floatarr>
18: R_ARM_CALL aux_arr_min_float
1c: e3003000 movw r3, #0
1c: R_ARM_MOVW_ABS_NC ref_out
20: e3403000 movt r3, #0
20: R_ARM_MOVT_ABS ref_out
24: e8bd4010 pop {r4, lr}
28: ed830a00 vstr s0, [r3]
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <min_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <min_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <min_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <min_floatarr>
8: R_ARM_THM_CALL aux_arr_min_float
c: 4b05 ldr r3, [pc, #20] @ (24 <min_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <min_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <min_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <min_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <min_floatarr>
8: R_ARM_THM_CALL aux_arr_min_float
c: 4b05 ldr r3, [pc, #20] @ (24 <min_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <min_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0000 movw r0, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg0
e: f2c0 0000 movt r0, #0
e: R_ARM_THM_MOVT_ABS ref_arg0
12: 6819 ldr r1, [r3, #0]
14: f7ff fffe bl 0 <min_floatarr>
14: R_ARM_THM_CALL aux_arr_min_float
18: f240 0300 movw r3, #0
18: R_ARM_THM_MOVW_ABS_NC ref_out
1c: f2c0 0300 movt r3, #0
1c: R_ARM_THM_MOVT_ABS ref_out
20: ed83 0a00 vstr s0, [r3]
24: e8bd 4008 ldmia.w sp!, {r3, lr}
28: f7ff bffe b.w 0 <result_float_ref>
28: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <min_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <min_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <min_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <min_floatarr>
8: R_ARM_THM_CALL aux_arr_min_float
c: 4b05 ldr r3, [pc, #20] @ (24 <min_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
riscv32#
00000000 <min_floatarr>:
0: 00000597 auipc a1,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0005a583 lw a1,0(a1) # 0 <min_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: c606 sw ra,12(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_min_float
18: 000080e7 jalr ra # 14 <min_floatarr+0x14>
1c: 40b2 lw ra,12(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00078793 mv a5,a5
22: R_RISCV_PCREL_LO12_I .L0
26: e388 fsw fa0,0(a5)
28: 0141 addi sp,sp,16
2a: 00000317 auipc t1,0x0
2a: R_RISCV_CALL_PLT result_float_ref
2e: 00030067 jr t1 # 2a <min_floatarr+0x2a>
riscv64#
0000000000000000 <min_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 0005a583 lw a1,0(a1) # 2 <min_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: e406 sd ra,8(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_min_float
18: 000080e7 jalr ra # 14 <min_floatarr+0x14>
1c: 60a2 ld ra,8(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a027 fsw fa0,0(a5) # 1e <min_floatarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <min_floatarr+0x28>
tricore#
00000000 <min_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <min_floatarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 44 00 00 lea %a4,[%a4]0 <0 <min_floatarr>>
c: R_TRICORE_LO2 ref_arg0
10: 6d 00 00 00 call 10 <min_floatarr+0x10>
10: R_TRICORE_24REL aux_arr_min_float
14: 91 00 00 20 movh.a %a2,0
14: R_TRICORE_HIADJ ref_out
18: d9 22 00 00 lea %a2,[%a2]0 <0 <min_floatarr>>
18: R_TRICORE_LO2 ref_out
1c: 74 22 st.w [%a2],%d2
1e: 1d 00 00 00 j 1e <min_floatarr+0x1e>
1e: R_TRICORE_24REL result_float_ref
x86#
00000000 <min_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg0
e: e8 fc ff ff ff call f <min_floatarr+0xf>
f: R_386_PC32 aux_arr_min_float
13: d9 1d 00 00 00 00 fstps 0x0
15: R_386_32 ref_out
19: 83 c4 14 add $0x14,%esp
1c: e9 fc ff ff ff jmp 1d <min_floatarr+0x1d>
1d: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <min_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <min_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 30 mov (%rax),%esi
d: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 14 <min_floatarr+0x14>
10: R_X86_64_PC32 ref_arg0-0x4
14: e8 00 00 00 00 call 19 <min_floatarr+0x19>
15: R_X86_64_PLT32 aux_arr_min_float-0x4
19: 4c 8d 05 00 00 00 00 lea 0x0(%rip),%r8 # 20 <min_floatarr+0x20>
1c: R_X86_64_PC32 ref_out-0x4
20: f3 41 0f 11 00 movss %xmm0,(%r8)
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
max_floatarr#
STENCIL void max_floatarr(void) {
// Largest element of float array
*(float *)REF(ref_out) = aux_arr_max_float(REF(ref_arg0), *(int *)REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <max_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000001 adrp x1, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000000 adrp x0, 0 <ref_arg0>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
c: 910003fd mov x29, sp
10: b9400021 ldr w1, [x1]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000000 add x0, x0, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
18: 94000000 bl 0 <max_floatarr>
18: R_AARCH64_CALL26 aux_arr_max_float
1c: 90000000 adrp x0, 0 <ref_out>
1c: R_AARCH64_ADR_PREL_PG_HI21 ref_out
20: a8c17bfd ldp x29, x30, [sp], #16
24: bd000000 str s0, [x0]
24: R_AARCH64_LDST32_ABS_LO12_NC ref_out
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <max_floatarr>:
0: e59f301c ldr r3, [pc, #28] @ 24 <max_floatarr+0x24>
4: e92d4010 push {r4, lr}
8: e5931000 ldr r1, [r3]
c: e59f0014 ldr r0, [pc, #20] @ 28 <max_floatarr+0x28>
10: ebfffffe bl 0 <max_floatarr>
10: R_ARM_CALL aux_arr_max_float
14: e59f3010 ldr r3, [pc, #16] @ 2c <max_floatarr+0x2c>
18: e8bd4010 pop {r4, lr}
1c: ed830a00 vstr s0, [r3]
20: eafffffe b 0 <result_float_ref>
20: R_ARM_JUMP24 result_float_ref
...
24: R_ARM_ABS32 ref_arg1
28: R_ARM_ABS32 ref_arg0
2c: R_ARM_ABS32 ref_out
armv7#
00000000 <max_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3000000 movw r0, #0
c: R_ARM_MOVW_ABS_NC ref_arg0
10: e3400000 movt r0, #0
10: R_ARM_MOVT_ABS ref_arg0
14: e5931000 ldr r1, [r3]
18: ebfffffe bl 0 <max_floatarr>
18: R_ARM_CALL aux_arr_max_float
1c: e3003000 movw r3, #0
1c: R_ARM_MOVW_ABS_NC ref_out
20: e3403000 movt r3, #0
20: R_ARM_MOVT_ABS ref_out
24: e8bd4010 pop {r4, lr}
28: ed830a00 vstr s0, [r3]
2c: eafffffe b 0 <result_float_ref>
2c: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <max_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <max_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <max_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <max_floatarr>
8: R_ARM_THM_CALL aux_arr_max_float
c: 4b05 ldr r3, [pc, #20] @ (24 <max_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
armv7mthumb_fpv5#
00000000 <max_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <max_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <max_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <max_floatarr>
8: R_ARM_THM_CALL aux_arr_max_float
c: 4b05 ldr r3, [pc, #20] @ (24 <max_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
armv7thumb#
00000000 <max_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0000 movw r0, #0
a: R_ARM_THM_MOVW_ABS_NC ref_arg0
e: f2c0 0000 movt r0, #0
e: R_ARM_THM_MOVT_ABS ref_arg0
12: 6819 ldr r1, [r3, #0]
14: f7ff fffe bl 0 <max_floatarr>
14: R_ARM_THM_CALL aux_arr_max_float
18: f240 0300 movw r3, #0
18: R_ARM_THM_MOVW_ABS_NC ref_out
1c: f2c0 0300 movt r3, #0
1c: R_ARM_THM_MOVT_ABS ref_out
20: ed83 0a00 vstr s0, [r3]
24: e8bd 4008 ldmia.w sp!, {r3, lr}
28: f7ff bffe b.w 0 <result_float_ref>
28: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <max_floatarr>:
0: b508 push {r3, lr}
2: 4b06 ldr r3, [pc, #24] @ (1c <max_floatarr+0x1c>)
4: 4806 ldr r0, [pc, #24] @ (20 <max_floatarr+0x20>)
6: 6819 ldr r1, [r3, #0]
8: f7ff fffe bl 0 <max_floatarr>
8: R_ARM_THM_CALL aux_arr_max_float
c: 4b05 ldr r3, [pc, #20] @ (24 <max_floatarr+0x24>)
e: ed83 0a00 vstr s0, [r3]
12: e8bd 4008 ldmia.w sp!, {r3, lr}
16: f7ff bffe b.w 0 <result_float_ref>
16: R_ARM_THM_JUMP24 result_float_ref
1a: bf00 nop
...
1c: R_ARM_ABS32 ref_arg1
20: R_ARM_ABS32 ref_arg0
24: R_ARM_ABS32 ref_out
riscv32#
00000000 <max_floatarr>:
0: 00000597 auipc a1,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 0005a583 lw a1,0(a1) # 0 <max_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: c606 sw ra,12(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_max_float
18: 000080e7 jalr ra # 14 <max_floatarr+0x14>
1c: 40b2 lw ra,12(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00078793 mv a5,a5
22: R_RISCV_PCREL_LO12_I .L0
26: e388 fsw fa0,0(a5)
28: 0141 addi sp,sp,16
2a: 00000317 auipc t1,0x0
2a: R_RISCV_CALL_PLT result_float_ref
2e: 00030067 jr t1 # 2a <max_floatarr+0x2a>
riscv64#
0000000000000000 <max_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000597 auipc a1,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 0005a583 lw a1,0(a1) # 2 <max_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000517 auipc a0,0x0
a: R_RISCV_PCREL_HI20 ref_arg0
e: 00050513 mv a0,a0
e: R_RISCV_PCREL_LO12_I .L0
12: e406 sd ra,8(sp)
14: 00000097 auipc ra,0x0
14: R_RISCV_CALL_PLT aux_arr_max_float
18: 000080e7 jalr ra # 14 <max_floatarr+0x14>
1c: 60a2 ld ra,8(sp)
1e: 00000797 auipc a5,0x0
1e: R_RISCV_PCREL_HI20 ref_out
22: 00a7a027 fsw fa0,0(a5) # 1e <max_floatarr+0x1e>
22: R_RISCV_PCREL_LO12_S .L0
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <max_floatarr+0x28>
tricore#
00000000 <max_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <max_floatarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 40 movh.a %a4,0
8: R_TRICORE_HIADJ ref_arg0
c: d9 44 00 00 lea %a4,[%a4]0 <0 <max_floatarr>>
c: R_TRICORE_LO2 ref_arg0
10: 6d 00 00 00 call 10 <max_floatarr+0x10>
10: R_TRICORE_24REL aux_arr_max_float
14: 91 00 00 20 movh.a %a2,0
14: R_TRICORE_HIADJ ref_out
18: d9 22 00 00 lea %a2,[%a2]0 <0 <max_floatarr>>
18: R_TRICORE_LO2 ref_out
1c: 74 22 st.w [%a2],%d2
1e: 1d 00 00 00 j 1e <max_floatarr+0x1e>
1e: R_TRICORE_24REL result_float_ref
x86#
00000000 <max_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_arg0
e: e8 fc ff ff ff call f <max_floatarr+0xf>
f: R_386_PC32 aux_arr_max_float
13: d9 1d 00 00 00 00 fstps 0x0
15: R_386_32 ref_out
19: 83 c4 14 add $0x14,%esp
1c: e9 fc ff ff ff jmp 1d <max_floatarr+0x1d>
1d: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <max_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <max_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 30 mov (%rax),%esi
d: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 14 <max_floatarr+0x14>
10: R_X86_64_PC32 ref_arg0-0x4
14: e8 00 00 00 00 call 19 <max_floatarr+0x19>
15: R_X86_64_PLT32 aux_arr_max_float-0x4
19: 4c 8d 05 00 00 00 00 lea 0x0(%rip),%r8 # 20 <max_floatarr+0x20>
1c: R_X86_64_PC32 ref_out-0x4
20: f3 41 0f 11 00 movss %xmm0,(%r8)
25: 48 83 c4 08 add $0x8,%rsp
29: e9 00 00 00 00 jmp 2e <.LC31+0x2>
2a: R_X86_64_PLT32 result_float_ref-0x4
sort_floatarr#
STENCIL void sort_floatarr(void) {
// Sorted copy of float array
aux_arr_sort_float(REF(ref_arg0), REF(ref_out), *(int *)REF(ref_arg1));
result_float_ref();
}
arm64#
0000000000000000 <sort_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <sort_floatarr>
20: R_AARCH64_CALL26 aux_arr_sort_float
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_float_ref>
28: R_AARCH64_JUMP26 result_float_ref
armv6#
00000000 <sort_floatarr>:
0: e59f3018 ldr r3, [pc, #24] @ 20 <sort_floatarr+0x20>
4: e92d4010 push {r4, lr}
8: e59f1014 ldr r1, [pc, #20] @ 24 <sort_floatarr+0x24>
c: e59f0014 ldr r0, [pc, #20] @ 28 <sort_floatarr+0x28>
10: e5932000 ldr r2, [r3]
14: ebfffffe bl 0 <sort_floatarr>
14: R_ARM_CALL aux_arr_sort_float
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_float_ref>
1c: R_ARM_JUMP24 result_float_ref
...
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg0
armv7#
00000000 <sort_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <sort_floatarr>
20: R_ARM_CALL aux_arr_sort_float
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_float_ref>
28: R_ARM_JUMP24 result_float_ref
armv7mthumb#
00000000 <sort_floatarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sort_floatarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <sort_floatarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <sort_floatarr+0x20>)
a: f7ff fffe bl 0 <sort_floatarr>
a: R_ARM_THM_CALL aux_arr_sort_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <sort_floatarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sort_floatarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <sort_floatarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <sort_floatarr+0x20>)
a: f7ff fffe bl 0 <sort_floatarr>
a: R_ARM_THM_CALL aux_arr_sort_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <sort_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <sort_floatarr>
1c: R_ARM_THM_CALL aux_arr_sort_float
20: e8bd 4008 ldmia.w sp!, {r3, lr}
24: f7ff bffe b.w 0 <result_float_ref>
24: R_ARM_THM_JUMP24 result_float_ref
armv81mthumb#
00000000 <sort_floatarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <sort_floatarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <sort_floatarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <sort_floatarr+0x20>)
a: f7ff fffe bl 0 <sort_floatarr>
a: R_ARM_THM_CALL aux_arr_sort_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_float_ref>
12: R_ARM_THM_JUMP24 result_float_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <sort_floatarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 00062603 lw a2,0(a2) # 0 <sort_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sort_float
20: 000080e7 jalr ra # 1c <sort_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <sort_floatarr+0x28>
riscv64#
0000000000000000 <sort_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00062603 lw a2,0(a2) # 2 <sort_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_sort_float
20: 000080e7 jalr ra # 1c <sort_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_float_ref
2c: 00030067 jr t1 # 28 <sort_floatarr+0x28>
tricore#
00000000 <sort_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <sort_floatarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_out
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <sort_floatarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <sort_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <sort_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_sort_float
1c: 1d 00 00 00 j 1c <sort_floatarr+0x1c>
1c: R_TRICORE_24REL result_float_ref
x86#
00000000 <sort_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_out
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <sort_floatarr+0x14>
14: R_386_PC32 aux_arr_sort_float
18: 83 c4 18 add $0x18,%esp
1b: e9 fc ff ff ff jmp 1c <sort_floatarr+0x1c>
1c: R_386_PC32 result_float_ref
x86_64#
0000000000000000 <sort_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <sort_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 10 mov (%rax),%edx
d: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 14 <sort_floatarr+0x14>
10: R_X86_64_PC32 ref_out-0x4
14: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1b <sort_floatarr+0x1b>
17: R_X86_64_PC32 ref_arg0-0x4
1b: e8 00 00 00 00 call 20 <sort_floatarr+0x20>
1c: R_X86_64_PLT32 aux_arr_sort_float-0x4
20: 48 83 c4 08 add $0x8,%rsp
24: e9 00 00 00 00 jmp 29 <.LC1+0x1>
25: R_X86_64_PLT32 result_float_ref-0x4
argsort_floatarr#
STENCIL void argsort_floatarr(void) {
// Indices that sort a float array
aux_arr_argsort_float(REF(ref_arg0), REF(ref_out), *(int *)REF(ref_arg1));
result_int_ref();
}
arm64#
0000000000000000 <argsort_floatarr>:
0: a9bf7bfd stp x29, x30, [sp, #-16]!
4: 90000002 adrp x2, 0 <ref_arg1>
4: R_AARCH64_ADR_PREL_PG_HI21 ref_arg1
8: 90000001 adrp x1, 0 <ref_out>
8: R_AARCH64_ADR_PREL_PG_HI21 ref_out
c: 910003fd mov x29, sp
10: b9400042 ldr w2, [x2]
10: R_AARCH64_LDST32_ABS_LO12_NC ref_arg1
14: 91000021 add x1, x1, #0x0
14: R_AARCH64_ADD_ABS_LO12_NC ref_out
18: 90000000 adrp x0, 0 <ref_arg0>
18: R_AARCH64_ADR_PREL_PG_HI21 ref_arg0
1c: 91000000 add x0, x0, #0x0
1c: R_AARCH64_ADD_ABS_LO12_NC ref_arg0
20: 94000000 bl 0 <argsort_floatarr>
20: R_AARCH64_CALL26 aux_arr_argsort_float
24: a8c17bfd ldp x29, x30, [sp], #16
28: 14000000 b 0 <result_int_ref>
28: R_AARCH64_JUMP26 result_int_ref
armv6#
00000000 <argsort_floatarr>:
0: e59f3018 ldr r3, [pc, #24] @ 20 <argsort_floatarr+0x20>
4: e92d4010 push {r4, lr}
8: e59f1014 ldr r1, [pc, #20] @ 24 <argsort_floatarr+0x24>
c: e59f0014 ldr r0, [pc, #20] @ 28 <argsort_floatarr+0x28>
10: e5932000 ldr r2, [r3]
14: ebfffffe bl 0 <argsort_floatarr>
14: R_ARM_CALL aux_arr_argsort_float
18: e8bd4010 pop {r4, lr}
1c: eafffffe b 0 <result_int_ref>
1c: R_ARM_JUMP24 result_int_ref
...
20: R_ARM_ABS32 ref_arg1
24: R_ARM_ABS32 ref_out
28: R_ARM_ABS32 ref_arg0
armv7#
00000000 <argsort_floatarr>:
0: e3003000 movw r3, #0
0: R_ARM_MOVW_ABS_NC ref_arg1
4: e3403000 movt r3, #0
4: R_ARM_MOVT_ABS ref_arg1
8: e92d4010 push {r4, lr}
c: e3001000 movw r1, #0
c: R_ARM_MOVW_ABS_NC ref_out
10: e3401000 movt r1, #0
10: R_ARM_MOVT_ABS ref_out
14: e5932000 ldr r2, [r3]
18: e3000000 movw r0, #0
18: R_ARM_MOVW_ABS_NC ref_arg0
1c: e3400000 movt r0, #0
1c: R_ARM_MOVT_ABS ref_arg0
20: ebfffffe bl 0 <argsort_floatarr>
20: R_ARM_CALL aux_arr_argsort_float
24: e8bd4010 pop {r4, lr}
28: eafffffe b 0 <result_int_ref>
28: R_ARM_JUMP24 result_int_ref
armv7mthumb#
00000000 <argsort_floatarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <argsort_floatarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <argsort_floatarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <argsort_floatarr+0x20>)
a: f7ff fffe bl 0 <argsort_floatarr>
a: R_ARM_THM_CALL aux_arr_argsort_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7mthumb_fpv5#
00000000 <argsort_floatarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <argsort_floatarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <argsort_floatarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <argsort_floatarr+0x20>)
a: f7ff fffe bl 0 <argsort_floatarr>
a: R_ARM_THM_CALL aux_arr_argsort_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
armv7thumb#
00000000 <argsort_floatarr>:
0: b508 push {r3, lr}
2: f240 0300 movw r3, #0
2: R_ARM_THM_MOVW_ABS_NC ref_arg1
6: f2c0 0300 movt r3, #0
6: R_ARM_THM_MOVT_ABS ref_arg1
a: f240 0100 movw r1, #0
a: R_ARM_THM_MOVW_ABS_NC ref_out
e: f2c0 0100 movt r1, #0
e: R_ARM_THM_MOVT_ABS ref_out
12: f240 0000 movw r0, #0
12: R_ARM_THM_MOVW_ABS_NC ref_arg0
16: f2c0 0000 movt r0, #0
16: R_ARM_THM_MOVT_ABS ref_arg0
1a: 681a ldr r2, [r3, #0]
1c: f7ff fffe bl 0 <argsort_floatarr>
1c: R_ARM_THM_CALL aux_arr_argsort_float
20: e8bd 4008 ldmia.w sp!, {r3, lr}
24: f7ff bffe b.w 0 <result_int_ref>
24: R_ARM_THM_JUMP24 result_int_ref
armv81mthumb#
00000000 <argsort_floatarr>:
0: b508 push {r3, lr}
2: 4b05 ldr r3, [pc, #20] @ (18 <argsort_floatarr+0x18>)
4: 4905 ldr r1, [pc, #20] @ (1c <argsort_floatarr+0x1c>)
6: 681a ldr r2, [r3, #0]
8: 4805 ldr r0, [pc, #20] @ (20 <argsort_floatarr+0x20>)
a: f7ff fffe bl 0 <argsort_floatarr>
a: R_ARM_THM_CALL aux_arr_argsort_float
e: e8bd 4008 ldmia.w sp!, {r3, lr}
12: f7ff bffe b.w 0 <result_int_ref>
12: R_ARM_THM_JUMP24 result_int_ref
16: bf00 nop
...
18: R_ARM_ABS32 ref_arg1
1c: R_ARM_ABS32 ref_out
20: R_ARM_ABS32 ref_arg0
riscv32#
00000000 <argsort_floatarr>:
0: 00000617 auipc a2,0x0
0: R_RISCV_PCREL_HI20 ref_arg1
4: 00062603 lw a2,0(a2) # 0 <argsort_floatarr>
4: R_RISCV_PCREL_LO12_I .L0
8: 1141 addi sp,sp,-16
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: c606 sw ra,12(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_argsort_float
20: 000080e7 jalr ra # 1c <argsort_floatarr+0x1c>
24: 40b2 lw ra,12(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <argsort_floatarr+0x28>
riscv64#
0000000000000000 <argsort_floatarr>:
0: 1141 addi sp,sp,-16
2: 00000617 auipc a2,0x0
2: R_RISCV_PCREL_HI20 ref_arg1
6: 00062603 lw a2,0(a2) # 2 <argsort_floatarr+0x2>
6: R_RISCV_PCREL_LO12_I .L0
a: 00000597 auipc a1,0x0
a: R_RISCV_PCREL_HI20 ref_out
e: 00058593 mv a1,a1
e: R_RISCV_PCREL_LO12_I .L0
12: 00000517 auipc a0,0x0
12: R_RISCV_PCREL_HI20 ref_arg0
16: 00050513 mv a0,a0
16: R_RISCV_PCREL_LO12_I .L0
1a: e406 sd ra,8(sp)
1c: 00000097 auipc ra,0x0
1c: R_RISCV_CALL_PLT aux_arr_argsort_float
20: 000080e7 jalr ra # 1c <argsort_floatarr+0x1c>
24: 60a2 ld ra,8(sp)
26: 0141 addi sp,sp,16
28: 00000317 auipc t1,0x0
28: R_RISCV_CALL_PLT result_int_ref
2c: 00030067 jr t1 # 28 <argsort_floatarr+0x28>
tricore#
00000000 <argsort_floatarr>:
0: 91 00 00 20 movh.a %a2,0
0: R_TRICORE_HIADJ ref_arg1
4: 19 24 00 00 ld.w %d4,[%a2]0 <0 <argsort_floatarr>>
4: R_TRICORE_LO2 ref_arg1
8: 91 00 00 50 movh.a %a5,0
8: R_TRICORE_HIADJ ref_out
c: 91 00 00 40 movh.a %a4,0
c: R_TRICORE_HIADJ ref_arg0
10: d9 55 00 00 lea %a5,[%a5]0 <0 <argsort_floatarr>>
10: R_TRICORE_LO2 ref_out
14: d9 44 00 00 lea %a4,[%a4]0 <0 <argsort_floatarr>>
14: R_TRICORE_LO2 ref_arg0
18: 6d 00 00 00 call 18 <argsort_floatarr+0x18>
18: R_TRICORE_24REL aux_arr_argsort_float
1c: 1d 00 00 00 j 1c <argsort_floatarr+0x1c>
1c: R_TRICORE_24REL result_int_ref
x86#
00000000 <argsort_floatarr>:
0: 83 ec 0c sub $0xc,%esp
3: ff 35 00 00 00 00 push 0x0
5: R_386_32 ref_arg1
9: 68 00 00 00 00 push $0x0
a: R_386_32 ref_out
e: 68 00 00 00 00 push $0x0
f: R_386_32 ref_arg0
13: e8 fc ff ff ff call 14 <argsort_floatarr+0x14>
14: R_386_PC32 aux_arr_argsort_float
18: 83 c4 18 add $0x18,%esp
1b: e9 fc ff ff ff jmp 1c <argsort_floatarr+0x1c>
1c: R_386_PC32 result_int_ref
x86_64#
0000000000000000 <argsort_floatarr>:
0: 48 83 ec 08 sub $0x8,%rsp
4: 48 8d 05 00 00 00 00 lea 0x0(%rip),%rax # b <argsort_floatarr+0xb>
7: R_X86_64_PC32 ref_arg1-0x4
b: 8b 10 mov (%rax),%edx
d: 48 8d 35 00 00 00 00 lea 0x0(%rip),%rsi # 14 <argsort_floatarr+0x14>
10: R_X86_64_PC32 ref_out-0x4
14: 48 8d 3d 00 00 00 00 lea 0x0(%rip),%rdi # 1b <argsort_floatarr+0x1b>
17: R_X86_64_PC32 ref_arg0-0x4
1b: e8 00 00 00 00 call 20 <argsort_floatarr+0x20>
1c: R_X86_64_PLT32 aux_arr_argsort_float-0x4
20: 48 83 c4 08 add $0x8,%rsp
24: e9 00 00 00 00 jmp 29 <.LC1+0x1>
25: R_X86_64_PLT32 result_int_ref-0x4